NiP Plating Seam Sealing with Low-Temperature Imide

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Solution Overview

Problem

The interface between metallization stacks and passivation in semiconductor devices experiences gaps or seams, allowing corrosive gases and liquids to penetrate, leading to adverse chemical reactions and erosion of AlCu, as common plating materials like NiP and Au do not adhere well to passivation materials like glass.

Innovation Solution

A structure is formed to cover the seam between the metallization stack and passivation, using an imide or oxide with a curing or deposition temperature below the recrystallization temperature of NiP, which extends from the periphery of the plating onto the passivation, creating a bondable area without causing stress-induced recrystallization of NiP.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If seams are present at the interface between metallization stack and passivation, then manufacturing simplicity is maintained, but corrosive gases and liquids can penetrate through, causing chemical reactions and erosion

Engineering Contradiction:
Improvesimplicity of interface structureVSAvoidprotection against corrosive penetration
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The intermediary layer acts as a protective barrier that seals the interface between the metallization stack and passivation, preventing corrosive gases and liquids from penetrating through seams while maintaining the overall simplicity of the manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a composite structure at the interface, combining the plating layer with the intermediary layer (TiN, Ti, or W) and the passivation layer. This composite material approach creates a multi-functional interface that provides both electrical conductivity and corrosion resistance.

Inventive Principle:
Principle #40Composite materials

2Reliability

If the structure extends from the periphery of the plating onto the passivation to cover the seam, then seam coverage and sealing are improved, but the bondable area for the plating is reduced

Engineering Contradiction:
Improveseam coverage and sealingVSAvoidbondable area of plating
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies the intermediary layer with localized quality - it is deposited specifically at the interface region where adhesion is needed, extending from the periphery of the plating onto the passivation to cover seams. This localized application ensures seam coverage while minimizing impact on the overall bondable area of the plating.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively seals the interface, preventing corrosive penetration and maintaining the structural integrity of the metallization stack while allowing for external electrical connections, thereby enhancing the reliability and longevity of semiconductor devices.

Implementation Method 1

forming the structure comprises curing an imide at a curing temperature below a recrystallization temperature of the NiP

Methodology Applied
Scientific EffectCuring:

Implementation Method 2

forming the structure comprises depositing an oxide at a deposition temperature below the recrystallization temperature of the NiP

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Implementation Method 3

a structure that covers the seam along a periphery of the plating and delimits a bondable area for the plating

Methodology Applied
Scientific EffectPhysical containment: Physical Containment

Data Source

PatentUS11501979B1Semiconductor device and method of producing a semiconductor device
Publication Date: 2022.11.15 INFINEON TECH AUSTRIA AG
  • US11501979B1 patent drawing
  • US11501979B1 patent drawing
  • US11501979B1 patent drawing

AI summary

A semiconductor device and a method of producing the semiconductor device are described. The semiconductor device includes: a semiconductor substrate; a metallization layer over the semiconductor substrate; a plating over the metallization layer, the plating including NiP; a passivation over the metallization layer and laterally adjacent the plating such that a surface of the plating that faces away from the semiconductor substrate is uncovered by the passivation, wherein a seam is present along an interface between the passivation and the plating; and a structure that covers the seam along a periphery of the plating and delimits a bondable area for the plating. The structure extends from the periphery of the plating onto the passivation. The structure includes an imide having a curing temperature below a recrystallization temperature of the NiP or an oxide having a deposition temperature below the recrystallization temperature of the NiP.