Nitride Semiconductor Current Aperture Without Etched Blocking Layers
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Solution Overview
Problem
Existing nitride-based semiconductor devices face challenges in efficiently forming current blocking layers without the need for etching processes, which can lead to surface states and reduced yield rates.
Innovation Solution
The introduction of a nitride-based semiconductor device structure that includes a single III-V group semiconductor layer with a high resistivity region and a current aperture, where the high resistivity region is formed by introducing oxygen atoms, allowing for the formation of a current blocking layer without etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an etching process is used to form a current blocking layer, then the current blocking function is achieved, but surface states are generated and yield rates are reduced
Solution Approach 1:
The patent replaces the mechanical/chemical etching process with an oxidation process to form the current blocking layer. Instead of removing material through etching, oxygen atoms are introduced to transform the III-V semiconductor layer into metal oxides with high resistivity, thereby eliminating surface state generation while achieving the current blocking function.
Solution Approach 2:
The patent changes the chemical composition and electrical properties of the III-V semiconductor layer by introducing oxygen atoms through oxidation. This transforms the layer from a conductive semiconductor state to a high-resistivity insulating state (metal oxide), achieving current blocking without the harmful effects of etching.
2Adaptability or versatility
If a traditional current blocking layer is formed, then current blocking is achieved, but profile adjustments are difficult to comply with different device designs
Solution Approach 1:
The patent introduces dynamics into the current blocking layer formation process by enabling profile adjustments through controlled oxidation. The oxidation process can be modulated to create different profiles (e.g., tapered, rounded, or flat tops) that adapt to various device design requirements, making the manufacturing process more flexible and versatile.
Solution Approach 2:
By controlling oxidation parameters (temperature, time, oxygen concentration), the patent enables flexible adjustment of the current blocking layer profile without changing the fundamental manufacturing process. This provides adaptability to different device designs while maintaining process simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of a current blocking layer that improves yield rates and allows for easier profile adjustments to comply with different device designs, while avoiding the destructive etching process.
Implementation Method 1
the high resistivity region comprises more metal oxides than the current aperture so as to achieve a resistivity higher than that of the current aperture
Implementation Method 2
the high resistivity region is formed by introducing oxygen atoms
Data Source
AI summary
A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a single III-V group semiconductor layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The single III-V group semiconductor layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The single III-V group semiconductor layer has a high resistivity region and a current aperture enclosed by the high resistivity region, in which the high resistivity region comprises more metal oxides than the current aperture so as to achieve a resistivity higher than that of the current aperture. The third nitride-based semiconductor layer is disposed over the second nitride-based semiconductor layer. The first source electrode, the second electrode, and the gate electrode are disposed over the third nitride-based semiconductor layer.