Nitride Semiconductor Chip Mounting to Limit Warping and Cracks
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Solution Overview
Problem
Nitride semiconductor chips on silicon substrates are prone to cracking due to differences in thermal expansion coefficients between the nitride semiconductor, silicon substrate, and surface mount package die pad, leading to warping and tensile stress.
Innovation Solution
A semiconductor device with a nitride semiconductor chip having a silicon substrate and an InxGayAl1-x-yN layer, bonded to a Cu-substrate die pad with a higher thermal expansion coefficient, where the thickness and length of the nitride semiconductor chip and the die pad are optimized to satisfy specific geometric relationships, thereby minimizing warping and stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a nitride semiconductor chip is mounted on a silicon substrate and bonded to a Cu-substrate die pad, then thermal conductivity is improved, but cracks occur due to thermal expansion coefficient differences
Solution Approach 1:
The patent applies parameter changes by precisely controlling the thickness of the nitride semiconductor chip (0.1-0.5mm) and the die pad (0.2-1.0mm) to satisfy specific ratio relationships. By adjusting these dimensional parameters, the patent optimizes the thermal conductivity while managing the thermal expansion stress to prevent cracks.
Solution Approach 2:
The patent employs composite materials by bonding the nitride semiconductor chip to a Cu-substrate die pad. This composite structure combines the high thermal conductivity of copper with the semiconductor functionality, improving heat dissipation while the adhesive layer manages the thermal expansion mismatch between materials.
2Strength
If the nitride semiconductor chip is bonded to the die pad, then mechanical strength is improved, but warping occurs due to thermal expansion differences
Solution Approach 1:
The patent controls warping by precisely managing the thickness parameters of the chip and die pad. By maintaining specific thickness ratios, the patent balances the mechanical properties to achieve strong bonding while minimizing differential thermal expansion that causes warping.
Solution Approach 2:
The adhesive layer acts as an intermediary between the nitride semiconductor chip and the Cu-substrate die pad. This intermediate layer accommodates the thermal expansion coefficient differences between the bonded materials, reducing stress concentration and preventing both cracking and excessive warping while maintaining bonding strength.
3Device complexity
If the thickness of the nitride semiconductor chip is reduced, then device integration is improved, but cracks occur due to increased tensile stress
Solution Approach 1:
The patent establishes specific parameter ranges for chip thickness (0.1-0.5mm) and die pad thickness (0.2-1.0mm) with defined ratio relationships. These parameter changes allow the use of thinner chips for better integration while the corresponding die pad thickness compensation maintains sufficient tensile stress resistance to prevent cracks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The optimized geometric relationships between the nitride semiconductor chip and the die pad effectively limit the occurrence of cracks in the nitride semiconductor chip, enhancing the reliability and reducing the risk of warping and stress-related failures.
Implementation Method 1
a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient
Data Source
AI summary
A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where 0≤x≤1, 0≤y≤1, 0≤x+y≤1; and a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm≥2.00×10−3×L2+0.173, tm being a thickness in mm and L being a length in mm.