Nitride Semiconductor FET With Graded P-Type Doping

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Solution Overview

Problem

Conventional field-effect transistors (FETs) using nitride semiconductors suffer from leakage current issues, leading to poor breakdown voltage control due to current flow in unintended regions, rather than the intended channel.

Innovation Solution

A field-effect transistor design with a substrate, buffer layer, and semiconductor layers where the p-type dopant concentration gradients are strategically controlled, with higher concentrations in the buffer layer and decreasing in the first semiconductor layer towards the second semiconductor layer, reducing leakage current and enhancing breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional nitride semiconductor FET structure is used, then device can operate at high frequencies with high breakdown voltage, but leakage current generates in underlayer regions causing poor breakdown voltage control

Engineering Contradiction:
Improvebreakdown voltage controlVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by creating a p-type doped region specifically in the underlayer (buffer layer and/or first semiconductor layer) with localized doping. This localized p-type region provides hole carriers that compensate electrons in the underlayer, reducing leakage current precisely where needed without affecting the overall device structure or channel performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The p-type doped underlayer acts as an intermediary between the substrate and the active channel region. By introducing holes in this intermediate layer, the patent compensates for electron leakage before it reaches the substrate, effectively blocking the harmful leakage current path while maintaining the high-frequency operation capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If p-type dopant is added to buffer layer and first semiconductor layer, then leakage current is reduced, but device structure complexity increases

Engineering Contradiction:
Improvebreakdown voltage controlVSAvoiddoping structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the doping parameter by introducing p-type dopants (such as magnesium) into specific layers of the nitride semiconductor structure. By controlling the doping concentration and distribution in the buffer layer and/or first semiconductor layer, the patent achieves leakage current reduction while maintaining a relatively simple overall device structure that can be integrated into existing HEMT fabrication processes.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The controlled p-type dopant concentration gradient significantly reduces leakage current and improves breakdown voltage, enabling more effective control of electric current between the source and drain electrodes.

Implementation Method 1

At least the buffer layer and the first semiconductor layer include a p-type impurity (i.e. dopant). The concentration of the p-type dopant in the buffer layer is higher than the concentration of the p-type dopant in the first semiconductor layer

Methodology Applied
Scientific EffectP-type doping: Dopants

Implementation Method 2

The concentration of the p-type dopant in the buffer layer is higher than the concentration of the p-type dopant in the first semiconductor layer, and the concentration of the p-type dopant in the first semiconductor layer is higher than the concentration of the p-type dopant in the second semiconductor layer

Methodology Applied
Scientific EffectConcentration gradient: Density Gradient

Data Source

PatentUS7459718B2Field effect transistor
Publication Date: 2008.12.02 NICHIA CORP
  • US7459718B2 patent drawing
  • US7459718B2 patent drawing
  • US7459718B2 patent drawing

AI summary

A FET includes a nitride semiconductor in which leak current is reduced and breakdown voltage is improved. The FET is formed from a substrate, a buffer layer made of a nitride semiconductor, a first semiconductor layer made of a nitride semiconductor, and a second semiconductor layer made of a nitride semiconductor, wherein at least the buffer layer and the first semiconductor layer include a p-type dopant. The concentration of the p-type dopant is higher in the buffer layer than that in the first semiconductor layer, and the concentration of the p-type dopant is higher in the first semiconductor layer than that in the second semiconductor layer.