Nitride Gate Electrode Overhang for Higher Withstand Voltage
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Solution Overview
Problem
Current nitride semiconductor devices face challenges in minimizing electric field concentration at the gate layer, which can lead to crystal defects and reduced gate withstand voltage, particularly due to the design of the gate electrode, affecting the device's performance and reliability.
Innovation Solution
The nitride semiconductor device incorporates a gate electrode with a longer length than the gate layer in the X-direction, ensuring that the gate electrode's ends do not contact the gate layer's surface, thereby limiting electric field concentration and preventing crystal defects, while also allowing for miniaturization of the gate layer without increasing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode length is equal to or shorter than the gate layer length, then the device structure is simpler and manufacturing is easier, but electric field concentration occurs at the gate layer ends causing crystal defects and reduced gate withstand voltage
Solution Approach 1:
The gate electrode is designed with asymmetric extension beyond the gate layer boundaries in the X-direction, creating an unequal field distribution pattern that prevents concentration at specific points. This asymmetric configuration ensures the gate electrode ends do not contact the gate layer surface, thereby preventing crystal defects while maintaining structural feasibility
Solution Approach 2:
The solution transitions from a one-dimensional alignment (gate electrode length matching gate layer length) to a two-dimensional configuration where the gate electrode extends beyond the gate layer boundaries. This dimensional change allows the electrode to overhang the gate layer, distributing the electric field more effectively and preventing concentration at the gate layer ends
2Productivity
If the gate layer is miniaturized to improve device integration, then device density increases, but resistance increases if the gate electrode is properly sized
Solution Approach 1:
The gate electrode maintains asymmetric extension beyond the miniaturized gate layer boundaries, ensuring that even as the gate layer shrinks, the electrode provides sufficient coverage to prevent electric field concentration. This allows continuous miniaturization without compromising resistance characteristics
Solution Approach 2:
By allowing the gate electrode to extend in the X-direction beyond the gate layer boundaries, the design decouples the electrode dimensions from the gate layer dimensions. This enables independent optimization where the gate layer can be miniaturized for higher density while the electrode maintains adequate size for low resistance
3Volume of moving object
If the gate electrode ends contact the gate layer surface, then the structure is more compact, but electric field concentration causes crystal defects and reliability degradation
Solution Approach 1:
The gate electrode is designed to asymmetrically overhang the gate layer, creating a configuration where the electrode ends deliberately do not contact the gate layer surface. This asymmetric non-contact configuration prevents electric field concentration and crystal defects while maintaining compact overall device structure
Solution Approach 2:
The gate electrode acts as an intermediary element that extends beyond the gate layer boundaries to mediate the electric field distribution. By positioning the electrode ends beyond the gate layer surface, it prevents direct field concentration at the gate layer ends, thereby preventing crystal defects while maintaining compactness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces electric field concentration at the gate layer, enhancing the device's reliability and performance by preventing crystal defects and maintaining low resistance, thus improving the gate withstand voltage and allowing for further miniaturization of the nitride semiconductor device.
Implementation Method 1
limiting electric field concentration at the gate layer
Data Source
AI summary
A nitride semiconductor device includes an electron transit layer, formed above a substrate, and an electron supply layer formed on the electron transit layer and having a larger band gap than the electron transit layer. A gate layer is formed on the electron supply layer and contains an acceptor impurity. A gate electrode is formed on the gate layer. A source electrode and a drain electrode are located at opposite sides of the gate layer and contact the electron supply layer. The gate electrode has a greater length than the gate layer in a first direction in which the source electrode, the gate layer, and the drain electrode are arranged. The gate electrode contacts an entire upper surface of the gate layer and extends from the gate layer toward at least one of the source electrode and the drain electrode.