Nitride HEMT Gate Structure With Doped Layer for Breakdown Control
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Solution Overview
Problem
High-electron-mobility transistors (HEMTs) face challenges with electric field distribution and breakdown phenomena due to strong peak electric fields near the edge of the gate electrode, often requiring multiple field plates that increase process complexity and induce parasitic capacitances, limiting operating frequency and reliability.
Innovation Solution
Regionally doping negatively-charged ions from a highly electronegative group into the nitride-based semiconductor layer to modify the electric field distribution, reducing the peak intensity of the electric field near the gate electrode and eliminating the need for multiple field plates by creating a high resistivity zone that depletes the two-dimensional electron gas region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple field plates are used to suppress breakdown phenomenon, then the electrical properties are improved, but parasitic capacitances are introduced which limit operating frequency and degrade device performance
Solution Approach 1:
The patent extracts the essential function of field plates (electric field modulation) and implements it through a simplified structure: a single gate electrode combined with a doped nitride-based semiconductor layer. This eliminates the need for multiple field plates while maintaining breakdown suppression capability, thereby reducing parasitic capacitances and device complexity.
Solution Approach 2:
The patent changes the doping concentration parameter of the nitride-based semiconductor layer to control electric field distribution. By adjusting the doping concentration in the doped layer, the device achieves effective electric field modulation and breakdown suppression without requiring additional field plate structures, thus avoiding the parasitic capacitance issue.
2Reliability
If multiple field plates are used to suppress breakdown phenomenon, then the electrical properties are improved, but the operating frequency is limited due to parasitic capacitances
Solution Approach 1:
The patent removes the multiple field plate structures that cause parasitic capacitances, retaining only the essential gate electrode and doped semiconductor layer combination. This extraction of unnecessary components eliminates the capacitance bottleneck, enabling higher operating frequencies while maintaining breakdown suppression through the doped layer's electric field control.
3Reliability
If the doping concentration of the second nitride-based semiconductor layer is increased, then the electric field distribution is modified to suppress breakdown, but the manufacturing precision requirements increase
Solution Approach 1:
The patent applies local quality by creating a doped nitride-based semiconductor layer with specific doping concentration only in certain regions (between the gate electrode and drift region). This localized doping approach allows precise electric field control where needed while avoiding the need for uniform high-precision doping across the entire device, thereby reducing overall manufacturing precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electric field distribution and suppresses breakdown phenomena, improving the semiconductor device's performance and reliability without the need for excessive field plates, thereby maintaining good electrical properties and reducing process complexity.
Implementation Method 1
An ion implantation process is performed, such that at least one portion of the second nitride-based semiconductor layer beneath the exposed blanket doped nitride-based semiconductor layer is doped with a dopant selected from a highly electronegative group
Data Source
AI summary
A semiconductor device includes a first and a second nitride-based semiconductor layers, a gate electrode, and a doped nitride-based semiconductor layer. The doped nitride-based semiconductor layer is disposed between the second nitride-based semiconductor layer and the gate electrode. The doped nitride-based semiconductor layer has a pair of opposite ledge portions free from coverage of the gate electrode and a central portion therebetween. The second nitride-based semiconductor layer has a first portion beneath the central portion and a second portion beneath the ledge portion, and the second nitride-based semiconductor layer has a doping concentration of a dopant that selected from a highly electronegative group, in which the doping concentration from the first portion to the second portion increases.