Nitride Semiconductor Layer Structure to Suppress Electron Trapping

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Solution Overview

Problem

Traditional nitride semiconductor devices face issues with electron trapping in high-resistance GaN layers, leading to reduced dynamic characteristics and off properties due to doping with carbon or iron, which affects the performance of power transistors.

Innovation Solution

A nitride semiconductor device configuration is introduced with a high-resistance third semiconductor layer disposed below the second semiconductor layer, obstructing electron traps and improving off properties by concentrating the electric field on a pn junction with high crystal quality, and the source electrode is designed to reduce ohmic contact resistance with the channel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-resistance GaN layer is doped with carbon or iron to improve off properties, then the off properties are improved, but electron trapping occurs leading to reduced dynamic characteristics

Engineering Contradiction:
Improveoff propertiesVSAvoiddynamic characteristics
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

A p-type semiconductor layer is introduced as an intermediary between the high-resistance n-type semiconductor layer and the channel. This p-type layer acts as a mediator that prevents direct electron trapping from the high-resistance layer while still allowing the high-resistance layer to provide its off-state current suppression function. The p-type layer with moderate resistance breaks the harmful direct interaction between electrons and the high-resistance layer's trap centers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The semiconductor structure is segmented into multiple functional layers: a high-resistance n-type layer for off-state control, a p-type layer for electron blocking, and an n-type channel layer for conduction. This segmentation allows each layer to optimize its specific function without the negative effects of the others, particularly isolating the channel from electron trapping while maintaining off-state performance.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the channel is formed by 2DEG in a regrowth layer to improve electrical properties, then the electrical properties are improved, but electron trapping in adjacent high-resistance layers reduces dynamic characteristics

Engineering Contradiction:
Improveelectrical propertiesVSAvoiddynamic characteristics
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The p-type semiconductor layer serves as a protective intermediary positioned between the 2DEG channel and the high-resistance n-type layer. It blocks electrons from the channel from being trapped by defects in the high-resistance layer, thereby preserving the dynamic characteristics while allowing the channel to maintain its excellent electrical properties formed by the 2DEG.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the dynamic characteristics and off properties of the nitride semiconductor device by suppressing electron trapping and concentrating the electric field on robust pn junctions, thereby improving reliability and breakdown voltage.

Implementation Method 1

concentrating the electric field on a pn junction with high crystal quality

Methodology Applied
Scientific EffectElectric field concentration: Electric Field

Implementation Method 2

The channel is formed by a two-dimensional electron gas (2DEG) generated in the regrowth layer

Methodology Applied
Scientific EffectTwo-dimensional electron gas generation: Conduction (electrical)

Data Source

PatentUS20240313061A1Nitride semiconductor device
Publication Date: 2024.09.19 PANASONIC HOLDINGS CORP
  • US20240313061A1 patent drawing
  • US20240313061A1 patent drawing
  • US20240313061A1 patent drawing

AI summary

A nitride semiconductor device includes a substrate, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer that has a resistance higher than that of the second semiconductor layer, and a fourth semiconductor layer of the second conductivity type that are arranged sequentially from a lower side; a fifth semiconductor layer including a channel region of the first conductivity type, a portion of the fifth semiconductor layer being disposed along the inner surface of a first opening and the other portion of the fifth semiconductor layer being disposed above the fourth semiconductor layer, the first opening penetrating through the fourth semiconductor layer, the third semiconductor layer, and the second semiconductor layer; a sixth semiconductor layer of the second conductivity type disposed above the fifth semiconductor layer; a gate electrode; a source electrode; and a drain electrode.