Nitride LED Barrier Doping Layout for Better Hole Injection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current nitride semiconductor light emitting elements face challenges in achieving high light emission efficiency due to the consumption of holes by well layers closer to the p-side semiconductor layer, which hinders efficient electron-hole recombination and light emission.

Innovation Solution

The structure includes a plurality of well and barrier layers with varying n-type impurity concentrations, where the first barrier layers have a higher n-type impurity concentration than the second barrier layers, and the second barrier layers are positioned closer to the p-side nitride semiconductor layer, facilitating hole supply to well layers near the center of the active layer for enhanced light emission efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If barrier layers are interposed between well layers with uniform n-type impurity concentration, then the structure is simple and easy to manufacture, but light emission efficiency is insufficient due to hole consumption by well layers closer to the p-side

Engineering Contradiction:
Improveease of manufactureVSAvoidlight emission efficiency
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent applies local quality by varying the n-type impurity concentration in barrier layers based on their position relative to the p-side semiconductor layer. Barrier layers closer to the p-side have lower n-type impurity concentrations, while those farther away have higher concentrations. This localized variation optimizes hole supply to different well layers, improving light emission efficiency without significantly complicating the manufacturing process.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If n-type impurity concentration is increased in barrier layers to improve carrier supply, then light emission efficiency improves, but crystallinity degradation occurs

Engineering Contradiction:
Improvelight emission efficiencyVSAvoidcrystallinity
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The patent applies parameter changes by systematically varying the n-type impurity concentration parameter in barrier layers based on their positional parameter (distance from p-side). This controlled parameter variation allows optimization of carrier supply for light emission while maintaining crystallinity by avoiding excessive impurity concentrations in any single barrier layer.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If well layers closer to p-side are used for light emission, then device structure is simplified, but hole supply is insufficient leading to reduced light emission efficiency

Engineering Contradiction:
Improvedevice complexityVSAvoidlight emission efficiency
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent addresses this contradiction by applying local quality to the barrier layers adjacent to well layers near the p-side. These specific barrier layers have lower n-type impurity concentrations, which facilitates hole supply from the p-side to these well layers. This localized modification enables efficient light emission from well layers closer to the p-side without requiring major structural changes to the device.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12191420B2Nitride semiconductor light emitting element and method of manufacturing same
Publication Date: 2025.01.07 NICHIA CORP
  • US12191420B2 patent drawing
  • US12191420B2 patent drawing

AI summary

A nitride semiconductor light emitting element includes: n-side and p-side nitride semiconductor layers; and an active layer. The active layer includes a plurality of well layers and a plurality of barrier layers. The plurality of well layers include first well layers, and second well layers positioned closer to the p-side nitride semiconductor layer than the first well layers. At least one of the plurality of barrier layers positioned between the first well layers and at least one of the plurality of barrier layers positioned between the second well layers respectively include a first barrier layer containing an n-type impurity, and a second barrier layer, wherein a concentration of the n-type impurity in the second barrier layer is lower than a concentration of the n-type impurity in the first barrier layer, and wherein the second barrier layer is positioned closer to the p-side nitride semiconductor layer than the first barrier layer.