Nitride LED Electrode Interface Doping for Stable High-Current Voltage

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Solution Overview

Problem

Conventional nitride-based semiconductor light-emitting elements experience increased element voltage under high-current density or high-temperature operations, leading to instability.

Innovation Solution

A nitride-based semiconductor light-emitting element with a surface layer region containing a high concentration of group IV n-type impurity and halogen element, where the peak concentration of the halogen element is at least 10% of the group IV n-type impurity, and a lower concentration in the internal region, along with a manufacturing method involving dry etching using plasma to form the n-side electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional n-type semiconductor structures are used, then the device can operate, but element voltage increases during large-current density or high-temperature operation leading to unstable voltage characteristics

Engineering Contradiction:
Improvevoltage characteristics stabilityVSAvoidoperation temperature and current density
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent applies local quality by creating a surface layer region with specifically engineered impurity concentrations that differ from the internal region. The surface layer has a peak group IV n-type impurity concentration of at least 1.0×10^21 cm^-3 and a halogen element concentration of at least 10% of the group IV impurity peak concentration, while the internal region has lower group IV impurity concentration. This localized differentiation stabilizes the electrode interface during high-temperature and large-current density operations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent utilizes parameter changes by precisely controlling the concentrations of group IV n-type impurities and halogen elements in different regions. The surface layer region maintains a peak group IV impurity concentration of at least 1.0×10^21 cm^-3 with halogen element concentration at least 10% of the group IV peak, creating optimal electrical characteristics that prevent resistance increase during operation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If high impurity concentration is used at the electrode contact portion, then ohmic characteristics improve, but resistance increases during large-current density or high-temperature operation

Engineering Contradiction:
Improveohmic contact stabilityVSAvoidresistance increase at electrode interface
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs composite material principles by combining group IV n-type impurities with halogen elements in specific concentrations within the surface layer region. This composite doping strategy creates a material composition that maintains stable ohmic contact characteristics, preventing resistance increase during large-current density or high-temperature operation while achieving favorable electrical characteristics.

Inventive Principle:
Principle #40Composite materials

3Productivity

If miniaturization and higher-power output are pursued, then chip size decreases and power output increases, but current densities increase requiring stable voltage characteristics

Engineering Contradiction:
Improvepower output and current densityVSAvoidvoltage stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by creating a surface layer region with specifically engineered impurity concentrations that differ from the internal region. The surface layer has a peak group IV n-type impurity concentration of at least 1.0×10^21 cm^-3 and a halogen element concentration of at least 10% of the group IV impurity peak concentration, while the internal region has lower group IV impurity concentration. This localized differentiation stabilizes the electrode interface during high-temperature and large-current density operations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent utilizes parameter changes by precisely controlling the concentrations of group IV n-type impurities and halogen elements in different regions. The surface layer region maintains a peak group IV impurity concentration of at least 1.0×10^21 cm^-3 with halogen element concentration at least 10% of the group IV peak, creating optimal electrical characteristics that prevent resistance increase during operation.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution stabilizes voltage characteristics under large-current density and high-temperature operations by inhibiting the diffusion of group IV n-type impurity into the n-side electrode, ensuring stable ohmic contact and reduced voltage increase.

Implementation Method 1

dry etching an n-type nitride-based semiconductor layer, using plasma containing a group IV n-type impurity and a halogen element

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

dry etching an n-type nitride-based semiconductor layer, using plasma containing a group IV n-type impurity and a halogen element

Methodology Applied
Scientific EffectDry etching:

Data Source

PatentUS12615885B2Nitride-based semiconductor light-emitting element and manufacturing method thereof
Publication Date: 2026.04.28 NUVOTON TECH CORP JAPAN
  • US12615885B2 patent drawing
  • US12615885B2 patent drawing
  • US12615885B2 patent drawing

AI summary

A nitride-based semiconductor light-emitting element includes: a substrate that is an example of a n-type nitride-based semiconductor including a group IV n-type impurity; and an n-side electrode in contact with the substrate. The substrate includes: a surface layer region in contact with the n-side electrode and including a halogen element; and an internal region located across the surface layer region from the n-side electrode. A peak concentration of the group IV n-type impurity in the surface layer region is at least 1.0×1021 cm−3. A peak concentration of the halogen element in the surface layer region is at least 10% of the peak concentration of the group IV n-type impurity in the surface layer region. A concentration of the group IV n-type impurity in the internal region is lower than a concentration of the group IV n-type impurity in the surface layer region.