Nitride Passivation Structure for RDL Crack Containment

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Solution Overview

Problem

The mismatch in coefficients of thermal expansion between different materials in the redistribution layer (RDL) of semiconductor devices leads to crack formation, which can propagate and cause device failure.

Innovation Solution

A multi-layer passivation structure with a nitride-based layer having a thickness of at least 40% of the total thickness, featuring layers with specific crack-reducing properties such as Young's modulus greater than 150 GPa and fracture toughness, is used to reduce tensile stress and confine cracks within the RDL.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a redistribution layer (RDL) is formed with different materials, then electrical connectivity and functionality are improved, but coefficient of thermal expansion mismatch leads to crack formation and device failure

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcrack formation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The RDL is divided into multiple sub-layers (first RDL sub-layer, second RDL sub-layer, third RDL sub-layer) with different materials. Each sub-layer has specific material compositions (e.g., Cu-W for first sub-layer, Cu-M for second sub-layer, Cu-N for third sub-layer) to manage thermal expansion differently, preventing crack propagation while maintaining electrical connectivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses composite materials in each RDL sub-layer, such as Cu-W (copper-tungsten), Cu-M (copper-molybdenum), and Cu-N (copper-nickel). These composite materials provide tailored coefficients of thermal expansion for each layer, allowing the structure to accommodate thermal stress without cracking while maintaining conductivity.

Inventive Principle:
Principle #40Composite materials

2Reliability

If multiple materials are used in the RDL to achieve desired electrical properties, then electrical connectivity is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidRDL structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex multi-material RDL is segmented into three distinct sub-layers, each with specific material compositions and thicknesses. This segmentation allows for systematic control of electrical and thermal properties while simplifying the manufacturing process by treating each sub-layer as a separate fabrication stage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent controls the thickness of each RDL sub-layer as a critical parameter (first sub-layer: 1-5 μm, second sub-layer: 0.5-2 μm, third sub-layer: 1-3 μm) to optimize both electrical connectivity and thermal expansion management. By adjusting these dimensional parameters, the complex multi-material structure achieves desired performance without excessive manufacturing difficulty.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly decreases the formation of cracks and reduces device failure rates by mitigating tensile stress in conductive features, thereby enhancing the reliability of semiconductor devices.

Implementation Method 1

the nitride-based passivation layer has a thickness that is at least 40% of a total thickness of the passivation layer. The nitride-based passivation layer reduces the formation of the cracks in the passivation layer and/or confines the cracks within the passivation layer

Methodology Applied
Scientific EffectStress confinement:

Data Source

PatentUS20240371810A1Semiconductor device structure and methods of forming the same
Publication Date: 2024.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240371810A1 patent drawing
  • US20240371810A1 patent drawing
  • US20240371810A1 patent drawing

AI summary

A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.