Nitride Semiconductor Device with AlN Buffer Layer for Si Substrates

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Solution Overview

Problem

The formation of nitride semiconductors on Si substrates is hindered by significant lattice mismatch and thermal expansion coefficient differences, leading to high dislocation densities, warpage, and cracking issues, which complicate the production of high-quality nitride semiconductors and pose challenges in electrode formation.

Innovation Solution

A semiconductor device structure is implemented with a Si substrate, a second nitride semiconductor layer with a threefold lattice period, an AlGaN buffer layer, an AlN/GaN superlattice, a GaN high-resistance layer, and specific electrode configurations to mitigate lattice mismatch and strain stress, reducing dislocation density and warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a nitride semiconductor is formed on a Si substrate, then mass production at low cost and heat dissipation are achieved, but high dislocation density and warpage occur due to lattice mismatch and thermal expansion coefficient difference

Engineering Contradiction:
Improvemass production capabilityVSAvoiddislocation density
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

An AlN buffer layer is introduced as an intermediary between the Si substrate and the GaN layer. This buffer layer acts as a mediator that accommodates the lattice mismatch and thermal expansion coefficient difference between Si and GaN, thereby reducing dislocation density in the GaN layer while enabling mass production on Si substrates

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If a nitride semiconductor is formed on a Si substrate, then low cost production is achieved, but warpage and cracking occur due to strain stress from lattice mismatch and thermal expansion difference

Engineering Contradiction:
Improveproduction costVSAvoidwafer integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The AlN buffer layer serves as a stress-absorbing intermediary that reduces strain stress caused by lattice mismatch and thermal expansion coefficient difference between Si substrate and GaN layer, preventing warpage and cracking while maintaining cost-effective Si substrate usage

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

By changing the material parameter (introducing AlN buffer layer with specific lattice constant and thermal expansion properties), the stress distribution in the heterostructure is optimized, reducing warpage and cracking risks while maintaining low-cost Si substrate production

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If a nitride semiconductor is formed on a Si substrate, then inexpensive substrate with good heat dissipation is achieved, but high dislocation density prevents high-quality semiconductor production

Engineering Contradiction:
Improvesubstrate availabilityVSAvoidsemiconductor quality
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The AlN buffer layer acts as a quality-improving intermediary that filters and reduces dislocations propagating from the Si substrate to the GaN layer, enabling high-quality semiconductor production on abundant and inexpensive Si substrates

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces dislocation density, enhances breakdown voltage, and improves the reliability of nitride semiconductor devices by minimizing leak current and crystal defects, allowing for thicker nitride semiconductor layers and stable wafer handling.

Implementation Method 1

the lattice mismatch between Si and the nitride semiconductor and a difference in thermal expansion coefficient between Si and the nitride semiconductor occur

Methodology Applied
Scientific EffectLattice mismatch:

Implementation Method 2

large warpage in a lower convex direction occurs in a wafer in which a nitride semiconductor is epitaxially grown on a Si substrate in a high temperature environment due to strain stress caused by the lattice mismatch and the difference between the thermal expansion coefficients

Methodology Applied
Scientific EffectStrain stress:

Implementation Method 3

a nitride semiconductor is epitaxially grown on a Si substrate in a high temperature environment

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 4

the difference between the thermal expansion coefficient of Si and the thermal expansion coefficient of GaN is about 60% and is significantly large

Methodology Applied
Scientific EffectThermal expansion coefficient difference: Thermal Expansion

Data Source

PatentUS10910489B2Semiconductor device
Publication Date: 2021.02.02 KK TOSHIBA
  • US10910489B2 patent drawing
  • US10910489B2 patent drawing
  • US10910489B2 patent drawing

AI summary

A semiconductor device according to an embodiment includes: a substrate; a first nitride semiconductor layer that is provided above the substrate, has a first lattice period in a first direction parallel to a substrate plane, and includes nitrogen and aluminum; a second nitride semiconductor layer that is provided between the substrate and the first nitride semiconductor layer and includes nitrogen and aluminum and of which at least a portion has a second lattice period that is three times the first lattice period in the first direction parallel to the substrate plane; a third nitride semiconductor layer provided above the first nitride semiconductor layer; a fourth nitride semiconductor layer that is provided on the third nitride semiconductor layer and has a larger bandgap than the third nitride semiconductor layer; at least one main electrode provided on the fourth nitride semiconductor layer; and a control electrode provided above the third nitride semiconductor layer, the control electrode being configured to control a current of the semiconductor device.