Nitride Semiconductor Annealing for Defect Control

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Solution Overview

Problem

Conventional annealing methods for gallium nitride compound semiconductors with cap layers face issues such as defect clustering when heated above 1400 degrees C, and existing methods do not effectively manage temperature increase speeds to prevent defect formation during the annealing process.

Innovation Solution

A manufacturing method for semiconductor devices that involves implanting impurities into a nitride semiconductor layer, followed by a controlled annealing process with specific temperature increase speeds and multiple annealing stages, including pre-annealing and main annealing at targeted temperatures, to minimize defect clustering and enhance crystal recovery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the nitride semiconductor layer is annealed at high temperature (above 1400 degrees C) to activate impurities, then impurity activation is improved, but defect clustering occurs

Engineering Contradiction:
Improveimpurity activationVSAvoiddefect clustering
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The annealing process is divided into multiple temperature stages: a first annealing at a lower temperature (below 1400°C) to reduce defects, followed by a second annealing at a higher temperature (above 1400°C) to activate impurities. This segmentation allows each stage to address different aspects of quality without causing harmful effects.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Before performing the high-temperature annealing to activate impurities, a preliminary low-temperature annealing is conducted to reduce defects in the nitride semiconductor layer. This preliminary action prevents defect clustering that would otherwise occur during subsequent high-temperature processing.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the temperature increase speed is high during annealing to reduce processing time, then productivity is improved, but defect formation increases

Engineering Contradiction:
Improveannealing processing timeVSAvoiddefect formation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The temperature increase process is segmented into different rates for different temperature ranges. A slower increase rate is used in the lower temperature range (below 1400°C) to prevent defect formation, while a faster increase rate is used in the higher temperature range (above 1400°C) to maintain productivity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces defect formation and improves the activation of impurities in the nitride semiconductor layer, leading to enhanced semiconductor device performance by carefully managing temperature increase speeds and using multiple annealing stages.

Implementation Method 1

In the implanting, the nitride semiconductor layer may be implanted with impurities

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a temperature of the nitride semiconductor layer may be increased from an initial temperature to a target temperature

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

the nitride semiconductor layer may be annealed at the target temperature for a predetermined time period

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS9905433B2Manufacturing method of semiconductor device including a nitride semiconductor layer
Publication Date: 2018.02.27 FUJI ELECTRIC CO LTD
  • US9905433B2 patent drawing
  • US9905433B2 patent drawing
  • US9905433B2 patent drawing

AI summary

An ion implantation results in defects generated in a nitride semiconductor layer. If the nitride semiconductor layer is set at a particular temperature for a predetermined time period after the ion implantation, the defects may probably be clustering. Provided is a manufacturing method of a semiconductor device including a nitride semiconductor layer comprising: implanting impurities in the nitride semiconductor layer; and increasing a temperature of the nitride semiconductor layer from an initial temperature to a target temperature and annealing the nitride semiconductor layer at the target temperature for a predetermined time period; wherein in the annealing, in at least part of temperature regions below a first temperature between the initial temperature and the target temperature, the nitride semiconductor layer is annealed at a temperature increase speed lower than in a temperature region not lower than the first temperature.