Nitride Semiconductor Device for High Breakdown Voltage and Low ON Resistance

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Solution Overview

Problem

Power semiconductor elements face a tradeoff between breakdown voltage and ON resistance, and existing materials like silicon struggle to achieve both high breakdown voltage and low ON resistance effectively.

Innovation Solution

A semiconductor device is designed with a specific structure using nitride semiconductors, including a buffer layer, intermediate layer, high resistance layer, and channel layer, which are formed using epitaxial growth methods to enhance breakdown voltage and reduce ON resistance, specifically incorporating AlGaN/GaN heterostructures to generate a two-dimensional electron gas for low resistance and a high resistance layer to improve breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a power semiconductor element uses conventional semiconductor materials like silicon, then the manufacturing process is mature and easy, but it cannot achieve both high breakdown voltage and low ON resistance simultaneously

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmaterial selection constraint
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs a composite semiconductor structure consisting of multiple layers with different materials and doping characteristics. Specifically, it uses a first semiconductor layer (undoped or lightly doped), a second semiconductor layer (heavily doped), and a third semiconductor layer (moderately doped), creating a composite structure that combines the advantages of different material regions to achieve both high breakdown voltage and low ON resistance simultaneously

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent applies local quality by creating regions with different doping concentrations and material properties within the semiconductor device. The first layer has low doping for high breakdown voltage, the second layer has high doping for low contact resistance, and the third layer has moderate doping for optimized performance, allowing each region to perform its specific function optimally

Inventive Principle:
Principle #3Local quality

2Reliability

If the semiconductor layer doping concentration is increased to reduce ON resistance, then the ON resistance decreases, but the breakdown voltage also decreases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddoping concentration control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent segments the semiconductor structure into three distinct layers with different doping concentrations. The first layer (undoped or lightly doped) maintains high breakdown voltage, the second layer (heavily doped) provides low series resistance, and the third layer (moderately doped) optimizes the trade-off. This segmentation allows each layer to be optimized independently for its specific function without compromising the other parameters

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes by varying the doping concentration across different layers. The doping concentration is changed from low in the first layer to high in the second layer, and then to moderate in the third layer. This systematic parameter variation allows the device to achieve both high breakdown voltage and low ON resistance by optimizing the electrical properties at different depths of the semiconductor structure

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If a HEMT structure with AlGaN/GaN heterostructure is used to generate two-dimensional electron gas for low ON resistance, then the ON resistance is reduced, but the device complexity increases

Engineering Contradiction:
ImproveON resistanceVSAvoidheterostructure layering
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent creates a multi-functional semiconductor structure where the same layered architecture simultaneously achieves multiple objectives: the undoped/lightly doped first layer provides high breakdown voltage, the heavily doped second layer provides low series resistance, and the moderately doped third layer optimizes overall device performance. This universal structure eliminates the need for separate optimization of different device parameters, simplifying the overall design while achieving low ON resistance without requiring complex heterostructures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The semiconductor device effectively suppresses breakdown even under high voltage conditions, achieving a balance between low ON resistance and high breakdown voltage by utilizing the nitride semiconductor structure, particularly by directing leakage current through the intermediate layer to prevent high resistance layer breakdown.

Implementation Method 1

a two-dimensional electron gas of high concentration is generated at a boundary between an AlGaN layer and a GaN layer by polarization

Methodology Applied
Scientific EffectPolarization: Polarisation

Implementation Method 2

intermediate layer, high resistance layer, and channel layer, which are formed using epitaxial growth methods

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS9627489B2Semiconductor device
Publication Date: 2017.04.18 KK TOSHIBA
  • US9627489B2 patent drawing
  • US9627489B2 patent drawing
  • US9627489B2 patent drawing

AI summary

A semiconductor device includes a first semiconductor layer on a substrate, a second semiconductor layer containing an n-type dopant, on the first semiconductor layer, a third semiconductor layer having a resistance greater than a resistance of the second semiconductor layer, on the second semiconductor layer, a fourth semiconductor layer containing a nitride semiconductor, on the third semiconductor layer, and a fifth semiconductor layer containing a nitride semiconductor having a band gap greater than a band gap of the fourth semiconductor layer, on the fourth semiconductor layer.