Nitride Semiconductor Device ESD Tolerance

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Solution Overview

Problem

Conventional nitride semiconductor devices face challenges in achieving high electrostatic discharge (ESD) tolerance due to nonuniform electric current distribution in the p-side nitride semiconductor layer, caused by irregularities in contact resistance and Mg concentration distribution, which limits the thickness of the p-side layer and affects crystallinity and manufacturing costs.

Innovation Solution

A nitride semiconductor device with a three-layer structure is implemented, comprising a p-side wide band gap layer and a three-layer structure of p-side nitride semiconductor layers with varying p-type impurity concentrations, where the third layer has a high impurity concentration, the second layer has a lower concentration, and the first layer has a narrower band gap and lower impurity concentration near the interface, ensuring uniform electric current distribution and enhanced ESD tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the p-side nitride semiconductor layer is made thicker to improve ESD tolerance, then the ESD tolerance is improved, but the crystallinity deteriorates and manufacturing cost increases

Engineering Contradiction:
ImproveESD toleranceVSAvoidcrystallinity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The p-side nitride semiconductor layer is divided into multiple sub-layers (first p-side nitride semiconductor layer, second p-side nitride semiconductor layer, third p-side nitride semiconductor layer) with different impurity concentrations. This segmentation allows each layer to contribute differently to the overall performance, enabling thicker total structure while maintaining crystallinity in individual layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the p-side nitride semiconductor layer are assigned different impurity concentrations: the first layer has lower impurity concentration (1×10^18 to 1×10^19 cm^-3) for good crystallinity, the second layer has intermediate concentration (1×10^19 to 1×10^20 cm^-3), and the third layer has higher concentration (1×10^20 to 1×10^21 cm^-3) for ESD tolerance. This local quality differentiation resolves the contradiction between thickness and crystallinity.

Inventive Principle:
Principle #3Local quality

2Reliability

If the p-type impurity concentration is increased to improve ESD tolerance, then the ESD tolerance is improved, but the hole mobility decreases

Engineering Contradiction:
ImproveESD toleranceVSAvoidhole mobility
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The p-side nitride semiconductor layer is segmented into multiple layers with different impurity concentrations. The first layer with lower impurity concentration (1×10^18 to 1×10^19 cm^-3) maintains high hole mobility, while the third layer with higher impurity concentration (1×10^20 to 1×10^21 cm^-3) provides ESD tolerance. This segmentation allows both requirements to be satisfied in different regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different impurity concentrations are assigned to different layers: the first layer has low impurity concentration for high hole mobility, the second layer has intermediate concentration for transition, and the third layer has high concentration for ESD tolerance. This local quality approach resolves the contradiction between hole mobility and ESD tolerance.

Inventive Principle:
Principle #3Local quality

3Object-affected harmful factors

If the Mg concentration is increased to reduce contact resistance, then the contact resistance is reduced, but the electric current distribution becomes nonuniform

Engineering Contradiction:
Improvecontact resistanceVSAvoidelectric current distribution uniformity
Core Design Contradiction:
Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The p-side nitride semiconductor layer is segmented into multiple layers with different impurity concentrations. The third layer with higher impurity concentration (1×10^20 to 1×10^21 cm^-3) reduces contact resistance, while the first and second layers with lower concentrations ensure uniform electric current distribution. This segmentation allows both requirements to be satisfied simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different impurity concentrations are assigned to different layers: the third layer has high concentration for low contact resistance, while the first and second layers have lower concentrations for uniform current distribution. This local quality differentiation resolves the contradiction between contact resistance and current distribution uniformity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The three-layer structure achieves uniform in-plane electric current distribution, improving ESD tolerance and optical output by maintaining high hole mobility and preventing local current concentration, while controlling the thickness and impurity concentration to maintain crystallinity and reduce manufacturing costs.

Implementation Method 1

the third p-side nitride semiconductor layer contains a p-type impurity of 5×10^20 to 2×10^21 cm^-3, the second p-side nitride semiconductor layer contains a p-type impurity in a lower concentration than that of the third p-side nitride semiconductor layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS7462884B2Nitride semiconductor device
Publication Date: 2008.12.09 NICHIA CORP
  • US7462884B2 patent drawing
  • US7462884B2 patent drawing
  • US7462884B2 patent drawing

AI summary

A nitride semiconductor device having excellent ESD tolerance, by preventing uneven distribution of the electric current in the p-side nitride semiconductor layer. The p-side nitride semiconductor layer (40) comprises, from the active layer (30) side, (a) a p-side wide band gap layer (12) containing a p-type impurity and (b) a three-layer structure (15) comprising a first p-side nitride semiconductor layer (16), a second p-side nitride semiconductor layer (17), and a third p-side nitride semiconductor layer (18).