Nitride Semiconductor Field Plate Design for Capacitance Reduction
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Solution Overview
Problem
Semiconductor devices face challenges in reducing source-drain capacitance and suppressing current collapse, especially at high frequencies, where existing field plates increase capacitance and degrade drain efficiency.
Innovation Solution
A semiconductor device design featuring a nitride semiconductor layer with a field plate positioned between the gate and drain electrodes, where the width of the field plate is 0.1 μm or more and the distance between the field plate and drain electrode is 3.5 μm or more, reducing source-drain capacitance and current collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a field plate is provided on an insulating layer between gate electrode and drain electrode, then current collapse is suppressed, but source-drain capacitance increases and drain efficiency degrades
Solution Approach 1:
The field plate is positioned only in the high-field region between the gate electrode and drain electrode, rather than spanning the entire device. This localized placement provides field control where needed to suppress current collapse while minimizing the capacitive coupling area between gate and drain, thus reducing source-drain capacitance and maintaining drain efficiency.
Solution Approach 2:
The field plate is extended in the vertical dimension above the insulating layer, creating a three-dimensional field control structure. This vertical extension allows the field plate to effectively control the electric field in the critical region without requiring a large lateral area, thereby reducing the parasitic capacitance while maintaining field control effectiveness.
2Reliability
If field plate width is increased to suppress current collapse, then reliability improves, but source-drain capacitance increases
Solution Approach 1:
The field plate width is optimized to be present only where the electric field is most intense (between gate and drain), providing localized field control. This prevents excessive width that would increase capacitance, while maintaining sufficient width to suppress current collapse in the critical region.
3Area of stationary object
If distance between field plate and drain electrode is reduced, then device area is minimized, but source-drain capacitance increases
Solution Approach 1:
The field plate utilizes the vertical dimension by extending above the insulating layer, allowing effective field control at a reduced lateral distance from the drain electrode. This three-dimensional configuration minimizes the lateral device area while the vertical extension maintains adequate electrical isolation to control source-drain capacitance.
Data Source
AI summary
A semiconductor device includes: a nitride semiconductor layer; a source electrode, a gate electrode and a drain electrode; an insulating layer covering at least the gate electrode and a part of the nitride semiconductor layer; and a field plate on the insulating layer, a width of a region of the field plate between an edge of the field plate of a side of the drain electrode and an edge of the side face of the insulating layer covering a side face of the gate electrode of a side of the drain electrode being 0.1 μm or more, a distance between an edge of the field plate and an edge of the drain electrode in a contact face between the nitride semiconductor layer and the drain electrode being 3.5 μm or more, an operating frequency of the semiconductor device being 4 GHz or less.