Nitride Semiconductor Device Field Concentration Suppression
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Solution Overview
Problem
Nitride semiconductor devices using group III nitride semiconductors face breakage due to electric field concentration at the p-n junction, limiting their performance in high-voltage and high-current applications.
Innovation Solution
A nitride semiconductor device structure with a p-n diode configuration, where the body region and n-type region are formed on a substrate with a gate insulating film and electrodes, allowing current to be preferentially fed to the p-n diode, reducing field concentration and preventing breakage, and a method involving ion implantation and epitaxial growth to create layers with different impurity concentrations and conductivity types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a bias positive on the side of the source electrode is supplied to the drain electrode, then the device can operate in high-voltage mode, but electric field concentration occurs at the p-n junction causing device breakage
Solution Approach 1:
The device is segmented into multiple functional regions: a drift region with graded impurity concentration, a p-type region, and an n-type region. This segmentation allows the electric field to be distributed across different regions, preventing concentration at a single p-n junction and enabling high-voltage operation without device breakage.
Solution Approach 2:
The drift region is designed with locally varying impurity concentration, transitioning from higher concentration near the p-type region to lower concentration toward the n-type region. This local quality variation optimizes the electric field distribution, allowing high-voltage blocking capability while maintaining reliability by preventing field concentration-induced breakdown.
2Device complexity
If a conventional p-n junction structure is used, then the device structure is simple, but electric field concentration causes avalanche breakdown
Solution Approach 1:
Instead of a single p-n junction, the device uses a segmented structure with a drift region containing multiple impurity concentration zones. This segmentation eliminates the sharp electric field concentration at a single junction interface, preventing avalanche breakdown while maintaining a relatively simple overall device structure.
Solution Approach 2:
The impurity concentration parameter is continuously varied in the drift region, creating a graded profile that smooths the electric field distribution. This parameter change eliminates the abrupt field concentration that causes avalanche breakdown in conventional step-junction structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure suppresses field concentration and avalanche breakdown, enhancing the device's reliability and reducing on-resistance, enabling high-power operation without device failure.
Implementation Method 1
an electric field may concentrate between the n-type GaN layer 85 and the p-type GaN layer 84, to break the device
Implementation Method 2
a method involving ion implantation and epitaxial growth to create layers with different impurity concentrations and conductivity types
Implementation Method 3
a method involving ion implantation and epitaxial growth to create layers with different impurity concentrations and conductivity types
Implementation Method 4
The structure suppresses field concentration and avalanche breakdown, enhancing the device's reliability
Data Source
AI summary
A nitride semiconductor device includes: a nitride semiconductor structure portion including a first layer made of an n-type group III nitride semiconductor, a second layer made of a group III nitride semiconductor containing a p-type impurity provided on the first layer and an n-type region formed on a part of the second layer, and having a wall surface extending over the first layer, a body region of the second layer other than the n-type region and the n-type region; a gate insulating film formed such that the gate insulating film is opposed to the body region on the wall surface; a gate electrode formed such that the gate electrode is opposed to the body region through the gate insulating film; a source electrode formed such that the source electrode is electrically connected to the n-type region; a drain electrode formed such that the drain electrode is electrically connected to the first layer; and a body electrode formed such that the body electrode is electrically connected to the body region.