Nitride Semiconductor Gate Structure for Etching Precision
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Solution Overview
Problem
High precision in etching depth is required during the gate part forming process in nitride semiconductor HEMTs to maintain 2D electron gas density, which is challenging for achieving a normally OFF type device suitable for power applications.
Innovation Solution
A nitride semiconductor device configuration with a third nitride semiconductor layer having a band gap greater than the first but less than the second nitride semiconductor layer, and a gate part formed on this layer with an acceptor-type impurity, reduces the etching depth precision needed by allowing the gate part to be formed with a thicker layer under the gate and a thinner layer elsewhere, thereby maintaining 2D electron gas density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type GaN layer is formed on an AlGaN electron supply layer and a gate electrode film is formed on the p-type GaN layer, then a normally OFF type device can be realized, but high precision is required to obtain the proper etching depth during the gate part forming process
Solution Approach 1:
The patent divides the original single-layer structure into multiple layers: an AlGaN electron supply layer, a GaN layer, and a low-Al composition AlGaN layer. This segmentation allows the etching process to selectively remove the low-Al composition AlGaN layer without significantly etching the underlying AlGaN electron supply layer, thereby reducing the required etching depth precision while maintaining device functionality.
Solution Approach 2:
The low-Al composition AlGaN layer acts as an intermediary layer between the p-type GaN layer and the AlGaN electron supply layer. This intermediary layer has different etching characteristics, allowing selective removal during the gate part forming process. It protects the electron supply layer from over-etching while enabling proper gate formation, thus reducing manufacturing precision requirements.
2Ease of manufacture
If the p-type GaN layer and gate electrode film are selectively etched, then a gate part is formed, but the 2D electron gas density is significantly varied depending on the etching depth
Solution Approach 1:
By segmenting the structure into distinct layers with different etching rates (GaN layer and low-Al composition AlGaN layer), the patent enables selective etching that removes only the low-Al composition AlGaN layer. This segmentation prevents variation in the thickness of the electron supply layer, thereby maintaining consistent 2D electron gas density regardless of minor etching depth variations.
Solution Approach 2:
The low-Al composition AlGaN layer serves as a cushioning layer that absorbs etching depth variations. Since this layer is designed to be selectively removed, it provides a buffer that prevents etching from affecting the underlying electron supply layer, thereby cushioning against variations in 2D electron gas density caused by etching depth inconsistencies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the precision required for etching depth, enabling the formation of a normally OFF type HEMT suitable for power devices by maintaining consistent 2D electron gas density and channel blocking at zero biasing.
Implementation Method 1
Due to the polarization caused by the lattice mismatch of GaN and AlGaN, a two-dimensional (2D) electron gas is formed in an inward position by a few Å from an interface between the electron transit layer and the electron supply layer
Data Source
AI summary
A nitride semiconductor device includes: a first nitride semiconductor layer serving as an electron transit layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer, the second nitride semiconductor layer having a band gap greater than that of the first nitride semiconductor layer and serving as an electron supply layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer, the third nitride semiconductor layer having a band gap greater than that of the first nitride semiconductor layer and smaller than that of the second nitride semiconductor layer; and a gate part formed on the third nitride semiconductor layer, wherein the gate part has a fourth nitride semiconductor layer formed on the third nitride semiconductor layer and includes an acceptor type impurity, and a gate electrode formed on the fourth nitride semiconductor layer.