Nitride Semiconductor Gate Surge Protection Diode

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Solution Overview

Problem

Conventional semiconductor devices with nitride semiconductors face limitations in gate surge resistance, leading to restricted device refinement and increased circuit area due to externally formed protection circuits, which complicate fabrication.

Innovation Solution

Incorporating a protection diode formed within the same nitride semiconductor layer as the field effect transistor, utilizing a two-dimensional electron gas to create a pn junction between n-type and p-type regions, electrically connected to the gate electrode, allowing excessive current to pass and enhancing surge resistance without increasing the device area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a protection circuit is externally formed to protect the gate from surge voltage, then the surge resistance is improved, but the circuit area increases and fabrication becomes complicated

Engineering Contradiction:
Improvesurge resistanceVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protection diode is merged with the HFET by forming both devices in the same nitride semiconductor layer. The p-type nitride semiconductor layer serves dual purposes: as the anode region for the protection diode and as a structural component of the HFET, eliminating the need for separate protection circuit fabrication

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The p-type nitride semiconductor layer performs multiple functions simultaneously: it acts as the anode for the protection diode, provides gate protection during surge conditions, and serves as part of the HFET structure. This multi-functionality reduces the number of fabrication steps while achieving both device functionality and protection

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a protection element is separately formed to protect the gate, then the surge resistance is improved, but the fabrication procedure becomes complicated due to additional diffusion layer formation

Engineering Contradiction:
Improvesurge resistanceVSAvoidfabrication simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The protection diode and HFET are formed in the same nitride semiconductor layer using the same fabrication sequence. The p-type layer is formed once and serves both as the protection diode anode and HFET structure, eliminating the need for separate diffusion layer formation procedures

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The p-type nitride semiconductor layer automatically serves dual purposes without requiring additional fabrication steps. By forming the protection element within the same layer structure as the HFET, the fabrication process serves both device creation and protection implementation simultaneously

Inventive Principle:
Principle #25Self-service

3Reliability

If the gate is protected from surge voltage using conventional methods, then the reliability is improved, but the device area increases

Engineering Contradiction:
Improvesurge resistanceVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The protection diode is nested within the HFET structure by forming both devices in the same nitride semiconductor layer. The p-type layer is shared between the protection diode and HFET, allowing the protection function to be embedded within the existing device footprint without requiring additional external circuit area

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the reduction of gate size and significantly improves surge resistance while minimizing fabrication complexity and circuit area, achieving high surge resistance in nitride semiconductor-based HFETs.

Implementation Method 1

a pn junction formed between an n-type region of a two-dimensional electron gas generated on the heterojunction interface and a p-type region of the p-type nitride semiconductor layer

Methodology Applied
Scientific EffectTwo-dimensional electron gas formation:

Implementation Method 2

the diode is electrically connected to the gate electrode and forms a current path for allowing an excessive current caused in the gate electrode to pass

Methodology Applied
Scientific EffectPN junction current conduction: Diode

Data Source

PatentUS7470958B2Semiconductor device
Publication Date: 2008.12.30 PANASONIC HOLDINGS CORP
  • US7470958B2 patent drawing
  • US7470958B2 patent drawing
  • US7470958B2 patent drawing

AI summary

A semiconductor device includes a field effect transistor and a pn junction diode formed on a substrate. The field effect transistor has a source electrode, a drain electrode and a gate electrode formed on an element forming layer including a plurality of nitride semiconductor layers. The diode includes a p-type nitride semiconductor layer selectively formed on the element forming layer and an ohmic electrode, and has a pn junction formed between an n-type region of a two-dimensional electron gas generated on a heterojunction interface and a p-type region of the p-type nitride semiconductor layer. The diode is electrically connected to the gate electrode and forms a current path for allowing an excessive current caused in the gate electrode to pass.