Normally Off Nitride Semiconductor Device Gate Region Segmentation
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Solution Overview
Problem
Traditional III group nitride semiconductor devices are typically normally on type, requiring a gate bias to turn off, leading to inefficiencies and complex, expensive driving circuits, which is undesirable for power applications.
Innovation Solution
A method to manufacture a normally off nitride semiconductor device by selectively etching or using a masking barrier to block the formation of two-dimensional electron gas (2DEG) at the hetero-junction interface between nitride semiconductor layers, allowing for a simple and cost-effective driving circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a hetero-junction structure is used to generate 2DEG for high current capability, then the device achieves high current transporting capability and high breakdown voltage, but the device becomes normally on type requiring complex driving circuits
Solution Approach 1:
The gate region is segmented into multiple zones: a first gate region with the hetero-junction structure that generates 2DEG for high current capability, and a second gate region where the hetero-junction is removed or modified to prevent 2DEG formation, enabling normally off operation. This segmentation allows different functional requirements to be satisfied in different spatial regions.
Solution Approach 2:
The device structure is made non-uniform by locally removing or modifying the hetero-junction structure in the second gate region while preserving it in the first gate region. This creates local quality differences where one region provides high current capability and another region provides normally off characteristics, resolving the contradiction between power capability and device simplicity.
2Strength
If a hetero-junction structure is used to generate 2DEG, then high breakdown voltage capability is achieved, but the device operates with less efficiency compared to normally off devices
Solution Approach 1:
The gate structure is divided into regions with different hetero-junction configurations. The first gate region maintains the full hetero-junction structure for high breakdown voltage, while the second gate region has the hetero-junction removed or modified to enable efficient normally off operation, reducing energy loss during normal operation.
Solution Approach 2:
Different regions of the gate are given different structural qualities: the first gate region has the complete AlGaN/GaN hetero-junction for high breakdown voltage capability, while the second gate region has a modified structure that prevents 2DEG formation, enabling efficient normally off operation and reducing operational energy loss.
3Device complexity
If the hetero-junction structure is completely removed to achieve normally off operation, then driving circuit complexity is reduced, but the device loses high current transporting capability
Solution Approach 1:
Instead of completely removing the hetero-junction structure, the invention segments the gate into two regions: the first gate region retains the hetero-junction structure to maintain high current transporting capability, while the second gate region has the hetero-junction removed or modified to enable normally off operation with simplified driving circuits.
Solution Approach 2:
The hetero-junction structure is selectively present in the first gate region to provide high current capability while being absent or modified in the second gate region to provide normally off characteristics. This local differentiation allows the device to achieve both high power capability and simplified driving circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables the production of efficient, normally off nitride semiconductor devices with a simplified driving circuit and reduced production costs by originally blocking the 2DEG formation below the gate region, facilitating a customized threshold voltage control and enhancing power semiconductor performance.
Implementation Method 1
etching a gate region above the second nitride semiconductor layer up to a predetermined depth of the first nitride semiconductor layer
Implementation Method 2
This 2DEG is generated according to a polarization effect by which negative charges are generated below an AlGaN surface
Implementation Method 3
forming an insulating film on the etched region and the second nitride semiconductor layer
Data Source
AI summary
The present invention relates to an enhancement normally off nitride semiconductor device and a method of manufacturing the same. The method includes the steps of: forming a buffer layer on a substrate; forming a first nitride semiconductor layer on the buffer layer; forming a second nitride semiconductor layer on the first nitride semiconductor layer; etching a gate region above the second nitride semiconductor layer up to a predetermined depth of the first nitride semiconductor layer; forming an insulating film on the etched region and the second nitride semiconductor layer; patterning a source/drain region, etching the insulating film in the source/drain region, and forming electrodes in the source/drain region; and forming a gate electrode on the insulating film in the gate region. In this manner, the present invention provides a method of easily implementing a normally off enhancement semiconductor device by originally blocking 2DEG which is generated under a gate region. In addition, the present invention provides an enhancement normally off power semiconductor device with a simple and efficient driving circuit in a HEMT device.