Nitride Semiconductor Device Gate Threshold Voltage Control
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Solution Overview
Problem
Existing nitride semiconductor HEMTs, particularly the normally-off type, face challenges in maintaining high-speed operation while ensuring a complete shut-off state at zero gate voltage due to potential leakage currents, which is exacerbated by the trade-off between gate threshold voltage and mutual conductance.
Innovation Solution
A nitride semiconductor device is designed with a specific deep acceptor concentration and carbon concentration in the region beneath the gate insulating film, optimizing the gate threshold voltage without significantly impacting high-speed operation by adjusting the deep acceptor concentration and carbon concentration to prevent weak inversion at zero gate voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate insulating film is increased in thickness, then the gate threshold voltage Vth is increased and the normally-off state is improved, but the mutual conductance gm is lowered and high-speed operation is adversely affected
Solution Approach 1:
The patent applies local quality by creating a carbon-doped region specifically in the electron transit layer beneath the gate insulating film. This localized doping concentrates the acceptor concentration where it is most needed - at the interface region that directly affects gate threshold voltage - while leaving other regions of the device unchanged to maintain their original high-speed characteristics.
Solution Approach 2:
The patent changes physical parameters by introducing carbon doping with specific concentration ranges (1×10^16 to 1×10^18 atoms/cm³) in the electron transit layer. This parameter change increases the gate threshold voltage through enhanced acceptor concentration at the heterojunction interface, achieving normally-off operation without requiring increased gate insulating film thickness that would harm high-speed performance.
2Reliability
If the gate insulating film is increased in thickness, then the gate threshold voltage Vth is increased, but the mutual conductance gm is lowered
Solution Approach 1:
The carbon-doped region is localized to the electron transit layer beneath the gate insulating film, creating a specific zone with enhanced acceptor concentration. This localized modification affects primarily the gate threshold voltage through interface effects, while leaving the bulk electron supply layer and channel regions intact to preserve mutual conductance.
Solution Approach 2:
By changing the carbon concentration parameter in the electron transit layer to specific ranges, the patent achieves gate threshold voltage control through modified acceptor concentration at the heterojunction interface. This parameter change provides an alternative mechanism to gate insulating film thickness for controlling Vth, thereby preserving gm.
3Reliability
If deep acceptor concentration is increased to prevent weak inversion, then the gate threshold voltage Vth is increased, but the device complexity increases
Solution Approach 1:
The patent applies local quality by restricting carbon doping to a specific region - the electron transit layer beneath the gate insulating film - rather than distributing dopants throughout the entire device structure. This localized approach prevents weak inversion while minimizing the overall complexity of the doping profile.
Solution Approach 2:
The patent changes the dopant type parameter from traditional group III elements to carbon, and adjusts the concentration parameter to specific ranges (1×10^16 to 1×10^18 atoms/cm³). This parameter change achieves weak inversion prevention through a relatively simple single-layer carbon doping profile, avoiding the need for complex multi-layer or graded doping structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the gate threshold voltage, ensuring a complete normally-off state with minimal impact on high-speed operation by preventing weak inversion and reducing leakage currents, thus enhancing the reliability of the nitride semiconductor HEMT.
Implementation Method 1
a region whose depth is 250 nm from an interface between the gate insulating film and the gate electrode includes a region which has a deep acceptor concentration equal to or more than 1.0×10^16 cm^−3
Implementation Method 2
a region whose depth is 250 nm from an interface between the gate insulating film and the gate electrode includes a region which has a carbon concentration equal to or more than 1.0×10^16 cm^−3
Implementation Method 3
the electron supply layer has a band-gap energy larger than the electron transit layer, and a two-dimensional electron gas layer is formed under a heterojunction interface of the two layers
Implementation Method 4
a heterojunction structure which is formed by stacking, on a substrate, a low-temperature buffer layer formed of GaN, a buffer layer formed of GaN, an electron transit layer formed of GaN and an electron supply layer formed of AlGaN
Data Source
AI summary
A nitride semiconductor device according to the present invention includes a nitride semiconductor layer including an electron transit layer and an electron supply layer which is in contact with the electron transit layer and which has a composition different from that of the electron transit layer, a gate electrode on the nitride semiconductor layer and a gate insulating film between the gate electrode and the nitride semiconductor layer. A region whose depth is 250 nm from an interface between the gate insulating film and the gate electrode includes a region which has a deep acceptor concentration equal to or more than 1.0×1016 cm−3.