Nitride Semiconductor Insulation Layer Oxygen Ratio
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Solution Overview
Problem
High electron trapping at the interface between semiconductor and insulation layers in HEMTs leads to current collapse due to negative fixed charges, increasing on-state resistance and depleting the channel.
Innovation Solution
A semiconductor device design incorporating a first nitride semiconductor layer, a second nitride semiconductor layer with a larger band gap, a gate electrode, and insulation layers with specific oxygen-to-silicon atomic ratios and nitrogen content to suppress electron trapping, including a silicon oxide layer with positive fixed charge and a second insulation layer with lower nitrogen density, positioned between the gate and drain electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage is applied between source and drain electrodes in off-state, then electron leakage occurs and electrons are trapped in interface, but this causes negative fixed charge and channel depletion in on-state, increasing on-state resistance
Solution Approach 1:
An insulation layer comprising silicon oxide with a specific oxygen-to-silicon atomic ratio (1.50 ≤ O/Si ≤ 1.85) is introduced as an intermediary layer between the gate electrode and the second nitride semiconductor layer. This specific composition ratio creates an insulation layer that prevents electron trapping at the interface while maintaining electrical insulation functionality, thereby suppressing current collapse without compromising device reliability
Solution Approach 2:
The patent applies parameter changes by precisely controlling the oxygen-to-silicon atomic ratio of the silicon oxide insulation layer within the range of 1.50 to 1.85. This specific parameter range optimizes the insulation layer's properties to prevent electron trapping and suppress negative fixed charge formation, resolving the contradiction between device stability and electron trapping effects
2Reliability
If electrons are trapped at interface between semiconductor and insulation layers, then negative fixed charge forms, but this leads to channel depletion and increased on-state resistance
Solution Approach 1:
The silicon oxide insulation layer with controlled O/Si ratio (1.50-1.85) serves as a mediator that prevents direct interaction between electrons and the gate electrode interface. This intermediary layer eliminates the formation of negative fixed charge that would otherwise cause current collapse, while maintaining the necessary electrical insulation for device operation
Solution Approach 2:
The patent employs composite material structure with multiple nitride semiconductor layers (first and second nitride semiconductor layers with different band gaps) and a silicon oxide insulation layer. This composite structure combines materials with different properties to prevent electron trapping while maintaining device functionality and performance consistency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively prevents current collapse by balancing charges and maintaining channel density, improving on-state resistance and off-breakdown voltage while enhancing the structural and functional reliability of HEMTs.
Implementation Method 1
including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less
Implementation Method 2
a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide containing nitrogen
Data Source
AI summary
A semiconductor device includes: a first nitride semiconductor layer, a second nitride semiconductor layer that is provided on the first nitride semiconductor layer and has a band gap larger than a band gap of the first nitride semiconductor layer, a gate electrode that is provided on the first nitride semiconductor layer, a first electrode that is electrically connected to the first nitride semiconductor layer, a second electrode disposed such that the gate electrode is positioned between the first electrode and the second electrode, and electrically connected to the first nitride semiconductor layer, and a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less.