Nitride Semiconductor Device with Local N-Type Capping
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Solution Overview
Problem
Conventional methods face challenges in manufacturing normally-off HFETs with group-III nitride semiconductors due to high contact resistance and complex manufacturing processes, particularly due to the diffusion of p-type impurities affecting the carrier supply layer and the need for multiple capping layers with different materials.
Innovation Solution
A semiconductor device structure and manufacturing method involving a substrate with a first nitride semiconductor layer, a second nitride semiconductor layer with a larger band gap, a p-type nitride semiconductor layer, and n-type nitride semiconductor layers on either side of the p-type layer, along with a gate electrode, where the surface layer of the carrier supply layer includes p-type impurities and the n-type capping layers do not, to achieve normally-off operation and reduced contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type capping layer is formed to achieve normally-off operation, then the threshold voltage becomes positive, but p-type impurities diffuse into the carrier supply layer causing high contact resistance
Solution Approach 1:
The device is divided into distinct functional regions: a first nitride semiconductor layer (channel), a second nitride semiconductor layer (carrier supply), and n-type capping layers positioned only in source/drain regions. This segmentation allows the carrier supply layer to maintain low resistance in contact regions while the gate region achieves normally-off operation through the absence of n-type capping, eliminating the need for p-type capping and its associated impurity diffusion problems.
Solution Approach 2:
Different regions of the carrier supply layer are given different properties: n-type capping layers are applied locally only to source and drain regions to reduce contact resistance, while the gate region remains uncapped to maintain the depletion layer for normally-off operation. This local differentiation resolves the contradiction between needing low contact resistance and maintaining positive threshold voltage.
2Manufacturing precision
If multiple capping layers with different materials are used to reduce contact resistance, then contact resistance decreases, but the manufacturing process becomes complex
Solution Approach 1:
The invention changes the doping type parameter from p-type to n-type in the capping layers, and changes the material composition parameter by using the same nitride semiconductor material throughout. This allows achieving low contact resistance through n-type doping rather than through complex multi-material capping structures, simplifying the manufacturing process while maintaining effectiveness.
3Reliability
If the carrier supply layer thickness is increased to achieve normally-off operation, then the threshold voltage becomes positive, but the on-resistance increases
Solution Approach 1:
The n-type capping layers are applied locally only to the source and drain regions where low resistance is needed, while the channel region maintains the required carrier supply layer thickness for normally-off operation. This local application of n-type doping reduces contact resistance without compromising the depletion layer formation in the gate region, thereby maintaining positive threshold voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables reproducible and controllable manufacturing of semiconductor devices with significantly reduced contact resistance and eliminates defects caused by p-type impurity diffusion, facilitating both low contact resistance and normally-off operation.
Implementation Method 1
a channel with higher concentrations of electrons (two-dimensional electron gas layer, 2DEG layer) is generated on the GaN layer side at the AlGaN/GaN interface, by piezoelectricity caused due to lattice constant difference between AlGaN and GaN and by their band gap difference
Data Source
AI summary
A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer above the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer; a p-type nitride semiconductor layer above the second nitride semiconductor layer; two third nitride semiconductor layers of n-type above the second nitride semiconductor layer and located separately on either side of the p-type nitride semiconductor layer; and a first ohmic electrode above one of the two third nitride semiconductor layers and a second ohmic electrode above the other of the two third nitride semiconductor layers; and a gate electrode above the p-type nitride semiconductor layer. The second nitride semiconductor layer includes, in a region above which neither the p-type nitride semiconductor layer nor the two third nitride semiconductor layers is located, a surface layer including p-type impurities identical to those in the p-type nitride semiconductor layer.