Nitride Semiconductor Plasma Etching Charge Dissipation

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Solution Overview

Problem

Plasma etching processes in semiconductor device formation often lead to charge accumulation, resulting in electric potential differences and currents that can damage semiconductor layers, particularly in nitride semiconductor materials, causing increased leak currents and arcing due to the high resistivity of these materials.

Innovation Solution

The process involves implanting ions to form isolation regions, depositing a metal film on the back and peripheral areas of the wafer, and forming an insulating film, with the conductive regions in the scribed areas exposed to plasma to dissipate charges to the apparatus ground through the metal film and peripheral conductive regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If plasma etching is performed on nitride semiconductor materials, then etching of insulating films is achieved, but charge accumulation occurs on the wafer surface causing electric potential differences and harmful currents

Engineering Contradiction:
Improveetching precisionVSAvoidcharge accumulation damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful charge accumulation effect into a beneficial process feature by utilizing the charge-up phenomenon to enable selective etching. The accumulated charges on the wafer surface create electric potential differences that enhance the etching selectivity between different regions, allowing precise pattern formation while managing the charge effect rather than simply avoiding it

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent applies local quality by creating different electrical conditions in different regions of the wafer. By forming conductive regions in scribed areas and peripheral areas while maintaining insulating regions in device areas, the patent enables charges to dissipate locally in non-critical areas while protecting critical device areas, thus addressing charge accumulation damage through spatially differentiated material properties

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If charges are allowed to accumulate on the wafer surface during plasma process, then electric potential difference is created for etching control, but substantial currents are induced causing damage to semiconductor layers and increased leak current

Engineering Contradiction:
Improveetching controlVSAvoidsemiconductor layer integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent extracts the harmful current path from the device areas by providing dedicated charge dissipation paths through conductive regions in scribed areas and peripheral areas. These extracted current paths allow charges to safely discharge away from the critical semiconductor layers in device areas, maintaining etching control benefits while protecting device integrity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces metal films as intermediary elements that facilitate controlled charge dissipation. The metal films deposited on the back surface and peripheral areas serve as intermediate conductive paths that enable charges to transition from the plasma environment to ground potential without directly affecting the semiconductor layers, thus mediating between the etching process and device protection

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the substrate is made of nitride semiconductor material with high resistivity, then device performance is improved, but charges during plasma process concentrate on the wafer surface causing arcing and fatal damages

Engineering Contradiction:
Improvedevice performanceVSAvoidarcing damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the wafer surface into distinct functional regions with different electrical properties. By dividing the wafer into device areas (with insulating films and high resistivity for device performance) and scribed/peripheral areas (with conductive regions for charge management), the patent enables simultaneous achievement of high-performance nitride semiconductor devices and protection against charge concentration effects through spatial segmentation

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses charge accumulation and reduces damage from plasma-induced currents, achieving uniform etching and significantly lowering leak currents in semiconductor devices.

Implementation Method 1

The plasma etching ionizes gasses such as carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), and so on with a radio frequency (RF) signal to make plasma

Methodology Applied
Scientific EffectPlasma ionization: Ionisation

Implementation Method 2

Ions and/or radials contained in the plasma may etch an insulating film of silicon nitride (SiN), silicon oxide (SiO), and so on

Methodology Applied
Scientific EffectPlasma etching:

Implementation Method 3

implanting ions between the device areas and the scribed areas to form isolation regions

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 4

accelerate the charges also induced by the plasma and accumulating on the surface of the conductive regions in the scribed areas to be dissipated to the apparatus ground through the conductive region of the peripheral area and the metal film adhering onto the back surface of the wafer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS9960043B2Process of forming semiconductor device
Publication Date: 2018.05.01 SUMITOMO ELECTRIC DEVICE INNOVATIONS
  • US9960043B2 patent drawing
  • US9960043B2 patent drawing
  • US9960043B2 patent drawing

AI summary

A process of forming a semiconductor device using plasma processes is disclosed. The semiconductor device includes a device area, a scribed area, and a peripheral area on a wafer, where these areas have respective conductive regions. The process includes steps of (a) implanting ions to isolate the conductive regions in the device area from the conductive region in the scribed area; (b) forming a metal film so as to cover a back surface, a side, and the peripheral area in the top surface of the wafer; (c) deposing insulating film on a whole surface of the wafer; and (d) selectively etching, by the plasma process, the insulating film so as to expose the conductive regions in the device area and the scribed area. During the plasma process, the metal film in the back surface of the wafer is connected the apparatus ground that effectively dissipates charges induced by the plasm to the apparatus ground through the metal film.