Nitride Semiconductor Device With Segmented Gate Structure
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Solution Overview
Problem
Nitride semiconductor devices with MOS structures face challenges in achieving low on-resistance while maintaining high breakdown voltage due to high electrical field intensity and channel mobility limitations, which can lead to increased on-resistance and potential breakdown voltage degradation.
Innovation Solution
A nitride semiconductor device with a horizontal switching structure, featuring a substrate, channel forming layer, source and drain regions, and a p-type gate region, which generates 2-dimensional electron and hole gas carriers to achieve a depletion state for low on-resistance and high breakdown voltage, with the gate region divided to minimize electrical field impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate-drain distance is increased to decrease electrical field intensity and protect the gate insulation film, then the reliability of the gate insulation film is improved, but the on-resistance increases due to reduced current flow capability
Solution Approach 1:
The gate structure is divided into multiple gate electrodes (first gate electrode and second gate electrode) separated by a groove. This segmentation allows the electrical field to be distributed across multiple smaller regions, reducing the peak field intensity at any single location while maintaining effective gate control over the channel, thereby protecting the insulation film without significantly increasing on-resistance.
Solution Approach 2:
A third nitride semiconductor layer with intermediate forbidden band width is introduced between the first and second nitride semiconductor layers. This intermediate layer acts as a mediator that modifies the electrical field distribution and carrier transport characteristics, enabling reduced field intensity while maintaining current flow efficiency.
2Reliability
If the gate length is increased to secure current barrier properties, then the breakdown voltage is improved, but the on-resistance increases due to lower channel mobility in the gate structure portion
Solution Approach 1:
The gate structure is segmented into multiple gate electrodes with a groove between them, creating multiple current barriers rather than relying on a single long gate. This segmentation achieves the required current barrier properties and breakdown voltage through the combined effect of multiple shorter barriers, avoiding the mobility penalty of a single long gate structure.
Solution Approach 2:
Different regions of the device are given different properties: the gate structure portion has optimized doping and layer composition for current barrier properties, while the channel region maintains high mobility characteristics. The intermediate nitride semiconductor layer is specifically designed with intermediate band width to optimize carrier transport in its local region.
3Object-affected harmful factors
If multiple layers of hetero-junction units are used to increase 2 DEG generation and decrease on-resistance, then the on-resistance is reduced, but high electrical field is generated in off state due to accumulated holes at the gate side
Solution Approach 1:
Holes are extracted from the system by introducing a p-type semiconductor layer that actively removes and neutralizes accumulated holes at the gate side. This prevents the buildup of positive charge that would otherwise create high electrical fields in the off state, protecting against breakdown while maintaining the benefits of multiple hetero-junction units for low on-resistance.
Solution Approach 2:
The holes that would normally be harmful (creating high field and reducing breakdown voltage) are converted into a beneficial effect by using them to generate 2-dimensional hole gas in the third nitride semiconductor layer, which then serves to balance the charge distribution and protect against excessive field buildup while maintaining device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves significantly reduced on-resistance and maintains high breakdown voltage by utilizing a p-type gate region to manage electrical fields and carrier generation, improving current flow efficiency and device performance.
Implementation Method 1
a generation quantity of 2-dimensional electron gas (hereinafter, referred to as 2 DEG) is increased and an on-resistance is decreased. Also, a desired off-breakdown voltage is achieved by a polarization effect
Implementation Method 2
The gate region is formed of a p-type semiconductor layer and is arranged between the source region and the drain region
Data Source
AI summary
A nitride semiconductor device includes a horizontal switching device that includes a substrate, a channel forming layer, a source region, a drain region and a gate region. The source region and the drain region are arranged apart from each other in one direction along a plane of the substrate. The gate region is formed of a p-type semiconductor layer and is arranged between the source region and the drain region. The gate region is divided into multiple parts in a perpendicular direction along the plane of the substrate, the perpendicular direction being perpendicular to an arrangement direction in which the source region and the drain region are arranged. Accordingly, on-resistance is decreased while securing high breakdown voltage.


