Nitride Semiconductor Layer Growth on Segmented Wafer

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Solution Overview

Problem

The existing methods for manufacturing semiconductor elements, such as LEDs, often result in cracks in the semiconductor layer and reduced yield due to non-uniformity and loss of flatness of the upper surface.

Innovation Solution

A method involving a wafer with distinct first and second regions on its surface, where the second region is at a lower position than the first and features an extension portion with tilted side surfaces, is used to grow a nitride semiconductor layer, which reduces crack propagation and enhances surface flatness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a semiconductor layer is grown on a wafer using conventional methods, then the semiconductor layer can be formed, but cracks occur in the semiconductor layer and the upper surface loses flatness

Engineering Contradiction:
Improvecrack resistanceVSAvoidsurface flatness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The wafer surface is segmented into a first region and a second region with different heights. The first region has a higher position and forms the main growth area, while the second region is at a lower position and acts as a buffer zone. This segmentation prevents cracks from propagating across the entire wafer surface while maintaining flatness in the first region where the semiconductor layer is grown.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces a height dimension difference between the first and second regions on the wafer surface. By creating a stepped structure where the second region is lower than the first region, the patent adds a vertical dimension to the otherwise planar wafer surface. This dimensional change allows cracks to be contained in the lower second region while preserving the flatness of the higher first region.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If the wafer surface is made flat to improve manufacturing precision, then surface flatness is improved, but cracks still occur in the semiconductor layer

Engineering Contradiction:
Improvesurface flatnessVSAvoidcrack resistance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

Different regions of the wafer surface are given different properties: the first region maintains a higher position and flat surface suitable for precise semiconductor layer growth, while the second region is positioned at a lower level and serves as a crack-absorbing zone. This local differentiation allows each region to fulfill its specific function - the first region ensures manufacturing precision while the second region provides crack resistance.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If conventional wafer structures are used, then the manufacturing process is simple, but the yield is reduced due to cracks and surface non-uniformity

Engineering Contradiction:
Improveprocess simplicityVSAvoidyield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The wafer is divided into functionally distinct first and second regions, where the first region optimizes for semiconductor layer quality and the second region optimizes for crack management. This segmentation increases yield by preventing defect propagation while maintaining relatively simple manufacturing processes that can be integrated into existing production lines.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11626301B2Method for manufacturing semiconductor element
Publication Date: 2023.04.11 NICHIA CORP
  • US11626301B2 patent drawing
  • US11626301B2 patent drawing
  • US11626301B2 patent drawing

AI summary

A method for manufacturing a semiconductor element includes: providing a wafer comprising first and second regions at an upper surface of the wafer, the second region being located at a periphery of the first region and being at a lower position than the first region; and forming a semiconductor layer made of a nitride semiconductor at the upper surface of the wafer. In a top-view, the first region comprises an extension portion at an end portion of the first region in a first direction that passes through the center of the wafer parallel to an m-axis of the semiconductor layer, the extension portion extending in a direction from a center of the wafer toward an edge of the wafer or in a direction from an edge of the wafer toward a center of the wafer.