Nitride Semiconductor Device Selective Growth p-GaN Leakage
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Solution Overview
Problem
Nitride semiconductor devices, particularly hetero-junction field effect transistors (HFETs), face challenges with gate oxide film characteristics, ion implantation, and thermal diffusion, leading to high leakage currents and suboptimal breakdown voltage characteristics due to the difficulty in forming high-quality p-type regions.
Innovation Solution
A semiconductor device structure is developed with a p-type GaN layer formed on an AlGaN layer, using selective growth techniques to minimize lattice defects and enhance crystalline quality, thereby reducing gate leakage current and improving breakdown voltage by locally forming the p-type GaN layer under the gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ion implantation and thermal diffusion are used to form p-type regions, then manufacturing process is established, but high leakage currents and poor breakdown voltage characteristics occur due to difficulty in forming high-quality p-type regions in GaN
Solution Approach 1:
The patent changes the fundamental approach from ion implantation/thermal diffusion to selective epitaxial growth of p-type GaN layers. By altering the growth parameters (using Mg doping during MOCVD growth instead of post-growth ion implantation), high-quality p-type regions are formed with controlled carrier concentration and minimal damage, thereby reducing leakage current and improving breakdown voltage
Solution Approach 2:
The patent replaces the mechanical/damage-prone ion implantation process with a chemical vapor deposition-based selective epitaxial growth process. This substitution eliminates the lattice damage inherent in ion implantation while achieving the desired p-type doping through in-situ Mg incorporation during selective GaN layer growth
2Manufacturing precision
If p-type GaN layer is formed by selective growth, then lattice defects and dislocation density are minimized, but additional manufacturing steps are required
Solution Approach 1:
The patent performs preliminary patterning of the GaN layer before epitaxial growth by selectively removing AlGaN barrier layers in desired regions. This preliminary action defines the exact locations where p-type GaN will grow, ensuring precise spatial control and minimal defects while integrating smoothly into the overall fabrication process
Solution Approach 2:
The patent merges the doping process with the epitaxial growth process by incorporating Mg doping during the selective GaN growth step. This combination eliminates the need for separate ion implantation and annealing steps, reducing overall process complexity while achieving high-quality p-type regions with controlled defect densities
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively minimizes gate leakage current and enhances breakdown voltage characteristics by moving the threshold voltage in a positive direction, increasing the reliability of nitride semiconductor devices through reduced lattice defects and improved crystallinity.
Implementation Method 1
a p type GaN layer is formed on the AlGaN layer... in forming the p type GaN layer, the p type GaN layer can be re-grown horizontally, rather than, vertically, on the exposed (or open) second GaN layer by using a local oxidation film mask pattern
Data Source
AI summary
A semiconductor device including a first GaN layer, an AlGaN layer, a second GaN layer, a gate electrode, a source electrode, and a drain electrode sequentially stacked on a substrate, capable of improving a leakage current and a breakdown voltage characteristics generated in the gate electrode by locally forming a p type GaN layer on the AlGaN layer, and a manufacturing method thereof, and a manufacturing method thereof are provided. The semiconductor device includes: a substrate, a first GaN layer formed on the substrate, an AlGaN layer formed on the first GaN layer, a second GaN layer formed on the AlGaN layer and including a p type GaN layer, and a gate electrode formed on the second GaN layer, wherein the p type GaN layer may be in contact with a portion of the gate electrode.