Nitride Semiconductor Transistor With Three-Layer Channel
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Solution Overview
Problem
Nitride semiconductor transistors face challenges in achieving both low on-resistance and high threshold voltage, making them unsuitable for efficient electric power control.
Innovation Solution
A semiconductor device with a nitride semiconductor buffer, channel, and barrier layers, along with a cap layer, is designed to generate specific strains and polarizations at interfaces, featuring a three-layer stacked channel layer structure with varying electron affinities and compositions to optimize electron distribution and mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a nitride semiconductor layer is used as the channel to achieve high withstand voltage and low resistance, then the transistor shows high threshold voltage characteristics, but the on-resistance becomes excessively high
Solution Approach 1:
The channel layer is divided into three sub-layers (first, second, and third layers) with different compositions and electron affinities. The second layer has higher electron affinity to accumulate electrons and form a high-density electron gas, while the first and third layers have lower electron affinity to prevent excessive carrier accumulation. This segmentation allows the channel to simultaneously achieve low on-resistance (through high electron density in the second layer) and high threshold voltage control (through the barrier layer and polarization effects).
Solution Approach 2:
Different regions of the channel layer are given different local properties: the second layer is designed with higher electron affinity to create a localized electron accumulation region, while the first and third layers have lower electron affinity to maintain barrier functions. The barrier layer is positioned specifically at the interface with the channel to provide localized potential control. This local quality differentiation enables simultaneous optimization of conduction (low on-resistance) and control (high threshold voltage).
2Device complexity
If the channel layer is made of a single nitride semiconductor material, then the structure is simple, but it is difficult to simultaneously achieve low on-resistance and high threshold voltage
Solution Approach 1:
The channel layer is segmented into three distinct sub-layers, each with specific thickness and composition ratios. The first layer has a first composition ratio, the second layer has a second composition ratio with higher electron affinity, and the third layer has a third composition ratio. This segmentation creates different electronic properties in each layer, enabling the formation of a high-density electron gas at the interface while maintaining overall structural organization and manufacturability.
Solution Approach 2:
The channel layer is constructed as a composite structure using the same nitride semiconductor material (e.g., GaN) but with different composition ratios and crystal orientations in each sub-layer. By varying the aluminum gallium nitride (AlxGa1-xN) composition ratio across the three layers, the patent creates a composite material system with graded electron affinity, enabling simultaneous achievement of low on-resistance and high threshold voltage without requiring entirely different materials.
3Reliability
If compression strains are generated at the interface between the cap layer and barrier layer, then polarization effects are enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent controls the composition ratio (x value in AlxGa1-xN) of the barrier layer within a specific range (0.05 ≤ x < 0.2) to generate appropriate compression strain at the interface with the cap layer. By adjusting this compositional parameter, the lattice mismatch is optimized to produce the desired polarization effect without excessive strain that would require ultra-precise manufacturing control. The cap layer thickness is also controlled (5 nm to 50 nm) to maintain the compression strain while ensuring manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables transistors with high threshold voltage and low on-resistance, preventing parallel conduction and reducing electron scattering, thus enhancing the transistor's performance for electric power control applications.
Implementation Method 1
the barrier layer and the channel layer are polarized; positive charge is higher than negative charge at an interface between the barrier layer and the channel layer
Implementation Method 2
Compression strains are generated at an interface between the cap layer and the barrier layer and an interface between the channel layer and the buffer layer, and a tensile strain is generated at an interface between the barrier layer and the channel layer
Data Source
AI summary
Compression strains are generated at an interface between the cap layer and the barrier layer and an interface between the channel layer and the buffer layer and a tensile strain is generated at an interface between the barrier layer and the channel layer. Therefore, negative charge is higher than positive charge at the interface between the cap layer and the barrier layer and the interface between the channel layer and the buffer layer, while positive charge is higher than negative charge at the interface between the barrier layer and the channel. The channel layer has a stacked layer structure of a first layer, a second layer, and a third layer. The second layer has a higher electron affinity than those of the first layer and the third layer.