Group III Nitride Semiconductor Sputtering Crystallinity
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Solution Overview
Problem
Conventional methods face challenges in achieving favorable crystallinity for group III nitride semiconductor films deposited using the sputtering method, particularly for light-emitting devices, due to lattice mismatch and substrate material limitations, which affects the quality and efficiency of the semiconductor layers.
Innovation Solution
A manufacturing method involving a substrate with a monocrystalline group III nitride semiconductor foundation layer, where the sputtering method is used to form lamination films with specific deposition conditions, including a gas atmosphere with nitrogen and inert gases, and the incorporation of dopants like Mg and Zn for p-type and Si, Ge, and Sn for n-type layers, to enhance crystallinity and conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the sputtering method is used to deposit group III nitride semiconductor films, then the manufacturing process can be simplified and productivity improved, but the crystallinity of the deposited films deteriorates due to lattice mismatch with hetero-substrates
Solution Approach 1:
The patent divides the semiconductor structure into multiple segments: a hetero-substrate, a buffer layer, and a group III nitride semiconductor layer. The buffer layer acts as an intermediate segment that bridges the substrate and the semiconductor layer, reducing the direct lattice mismatch impact and improving crystallinity while maintaining the sputtering manufacturing process.
Solution Approach 2:
The buffer layer serves as an intermediary between the hetero-substrate and the group III nitride semiconductor layer. This intermediate layer mitigates the lattice mismatch stress and provides a better crystal structure foundation for the semiconductor layer, enabling high crystallinity deposition via sputtering.
2Manufacturing precision
If a low-temperature buffer layer is deposited before epitaxial growth, then favorable crystallinity can be achieved, but the manufacturing process complexity and time increase
Solution Approach 1:
The patent combines the buffer layer deposition and semiconductor layer deposition into a single sputtering process sequence. By using reactive sputtering with nitrogen gas, the method deposits both the buffer layer and the semiconductor layer with consistent process parameters, simplifying the overall manufacturing process while maintaining high crystallinity.
Solution Approach 2:
The patent optimizes sputtering parameters including nitrogen gas flow rate, substrate temperature, and RF power to achieve favorable crystallinity directly during the deposition process. By controlling these parameters, the method eliminates the need for separate low-temperature buffer layer deposition at different temperature conditions.
3Ease of manufacture
If direct epitaxial growth is attempted on hetero-substrates, then substrate cost is reduced, but the crystal quality deteriorates due to large lattice mismatch
Solution Approach 1:
The buffer layer acts as an intermediary that enables direct growth on hetero-substrates while maintaining high crystal quality. This intermediate layer absorbs the lattice mismatch stress and provides a template for high-quality crystal growth, making hetero-substrates viable for manufacturing.
Solution Approach 2:
The patent controls deposition parameters such as substrate temperature, nitrogen gas flow rate, and RF power during sputtering to compensate for the lattice mismatch between hetero-substrates and group III nitride semiconductors. These parameter optimizations enable high crystal quality growth directly on cost-effective hetero-substrates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the deposition of group III nitride semiconductor layers with improved crystallinity and conductivity, suitable for high-performance light-emitting devices such as LEDs, by optimizing substrate temperature, gas ratios, and dopant incorporation, thereby overcoming previous limitations in sputtering techniques.
Implementation Method 1
a manufacturing method of a group III nitride semiconductor light-emitting device in which a substrate on which is formed a foundation layer including a monocrystalline group III nitride semiconductor is used as the substrate, the substrate including the foundation layer and a target made from a group III metal or an alloy including a group III metal is placed in a sputtering chamber, and the lamination films are formed on the foundation layer by a sputtering method
Data Source
AI summary
The present invention provides a manufacturing method of a group III nitride semiconductor light-emitting device, including a lamination step of forming a plurality of lamination films including a group III nitride semiconductor on a substrate, in which a substrate on which is formed a foundation layer including a monocrystalline group III nitride semiconductor is used as the substrate, and lamination films are formed on the foundation layer by a sputtering method, with the substrate including the foundation layer and a target made from a group III metal or an alloy including a group III metal being placed in a sputtering chamber.