III-Nitride Substrate Regrowth Using Etched Pits for Dislocation Control
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Solution Overview
Problem
Existing methods for manufacturing group III nitride semiconductor substrates face challenges such as high dislocation densities due to lattice mismatch, leading to reduced luminance efficiency in LEDs and increased leak currents in power devices, and additional processes result in higher production costs and substrate warpage.
Innovation Solution
A manufacturing method involving the formation of a protective layer followed by selective gas-phase etching to create pits on dislocation portions, and subsequent regrowth of a third group III nitride semiconductor layer to prevent dislocation extension, using AlN or SiNx layers with controlled etching conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a SiN buffer body is formed discretely on the first GaN-based compound semiconductor layer, then dislocation in the second GaN-based compound semiconductor layer is reduced, but dislocation extends from the first layer to the second layer at portions where the buffer body is not formed
Solution Approach 1:
The patent introduces a protective layer as an intermediary substance between the first and second GaN-based compound semiconductor layers. This protective layer covers the entire surface including dislocation portions, enabling uniform gas-phase etching to form pits that prevent dislocation extension. The protective layer mediates the etching process to achieve comprehensive dislocation control rather than localized reduction.
Solution Approach 2:
The patent changes the physical and chemical parameters of the protective layer (material composition, thickness, coverage area) to optimize the gas-phase etching process. By controlling the protective layer's properties, the etching conditions are adjusted to selectively form pits at dislocation portions while maintaining overall layer integrity, thereby preventing dislocation extension.
2Manufacturing precision
If an SiO2 layer is patterned into stripe form on an Si substrate, then dislocation is reduced due to lateral growth, but additional patterning process is required resulting in increased production cost
Solution Approach 1:
The patent extracts the patterning step from the manufacturing process by forming a protective layer that covers the entire substrate surface without requiring stripe patterning. This eliminates the need for additional photolithography and etching processes to create patterned buffer layers, thereby reducing production cost while still achieving dislocation reduction through uniform protective layer formation and subsequent gas-phase etching.
Solution Approach 2:
The patent segments the dislocation control function into two independent steps: (1) forming a continuous protective layer covering the entire surface, and (2) selectively etching pits at dislocation portions through gas-phase processing. This segmentation eliminates the need for complex stripe patterning while achieving localized dislocation control through the selective etching mechanism.
3Manufacturing precision
If the group III nitride semiconductor layer is grown on the stripe SiO2 layer, then dislocation is reduced, but uneven stress application from lattice constant difference and thermal expansion coefficient difference results in substrate warpage
Solution Approach 1:
The patent applies local quality by forming pits selectively at dislocation portions through gas-phase etching of the protective layer. This creates localized modifications only where dislocations exist, allowing stress relief at specific points without creating global substrate warpage. The protective layer maintains uniform coverage while the etching process introduces local variations to address dislocation issues.
Solution Approach 2:
Instead of using patterned buffer layers to control dislocation (which causes warpage), the patent inverts the approach by using a continuous protective layer and selectively removing material at dislocation sites through gas-phase etching. This reverse methodology achieves dislocation control without the stress concentration and warpage problems associated with patterned buffer structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method efficiently reduces surface dislocation density in group III nitride semiconductor substrates, enhancing their performance and reducing production costs by minimizing dislocation-related issues.
Implementation Method 1
a third step of selectively forming pits on dislocation portions of the second group III nitride semiconductor layer by gas-phase etching applied to the protective layer and the second group III nitride semiconductor layer
Implementation Method 2
a fourth step of forming a third group III nitride semiconductor layer on the second group III nitride semiconductor layer and/or the remaining protective layer
Data Source
Figure 1A~1E
Figure 2~3
Figure 4
AI summary
A manufacturing method for a group III nitride semiconductor substrate is provided with a first step of forming a second group III nitride semiconductor layer on a substrate; a second step of forming a protective layer on the second group III nitride semiconductor layer; a third step of selectively forming pits on dislocation portions of the second group III nitride semiconductor layer by gas-phase etching applied to the protective layer and the second group III nitride semiconductor layer; and a fourth step of forming a third group III nitride semiconductor layer on the second group III nitride semiconductor layer and/or the remaining protective layer so as to allow the pits to remain.