Nitride Semiconductor Substrate with Si Seed Layer for Warpage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional nitride semiconductor substrates are inadequate for large-diameter and thick nitride semiconductor layers, failing to adequately address the requirements for high-frequency devices in terms of warpage, dislocation density, and withstand voltage.
Innovation Solution
A nitride semiconductor substrate with a polycrystalline aluminum nitride substrate and a Si single crystal seed layer, featuring a buffer layer doped with Si and C elements, which has a specific resistance of 100 Ω·cm or more and a concentration profile with peak distributions to enhance withstand voltage and reduce parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional silicon substrate is used for nitride semiconductor substrate, then parasitic capacitance is reduced, but warpage and dislocation density increase when enlarging wafer diameter and thickening nitride semiconductor layers
Solution Approach 1:
The patent employs a composite substrate structure consisting of a silicon substrate with a specific resistance of 100 Ω·cm or more (to reduce parasitic capacitance) combined with a buffer layer system doped with both Si and C elements. This composite approach allows the silicon substrate to provide low parasitic capacitance while the buffer layer compensates for warpage and dislocation issues, resolving the contradiction between electrical performance and manufacturing precision.
Solution Approach 2:
The patent changes the doping parameters of the buffer layer by introducing both Si and C elements with specific concentration profiles. The Si element concentration is optimized to match thermal expansion coefficients and reduce dislocation, while C element doping enhances withstand voltage. This parameter optimization allows the buffer layer to compensate for substrate-induced warpage and dislocation, enabling the use of high-resistance silicon substrates without sacrificing manufacturing precision.
2Productivity
If wafer diameter is enlarged to 6 inches or more for high frequency device production, then productivity increases, but control over warpage and dislocation density becomes difficult
Solution Approach 1:
The patent applies local quality by creating a buffer layer with non-uniform doping concentration. The buffer layer has a first region with higher Si element concentration near the substrate interface to suppress dislocation generation, and a second region with lower concentration toward the active layer to reduce warpage. This spatial variation in doping quality allows large-diameter wafers to be produced while maintaining control over warpage and dislocation density across the entire wafer surface.
Solution Approach 2:
The patent optimizes doping parameters including Si element concentration (1×10^18 to 1×10^20 atoms/cm³), C element concentration (1×10^19 to 1×10^21 atoms/cm³), and layer thickness (3 μm to 10 μm) to enable production of 6-inch or larger wafers while maintaining manufacturing precision. These parameter changes allow the buffer layer to effectively manage stress and dislocation in large-diameter structures.
3Strength
If nitride semiconductor layers are thickened to improve withstand voltage, then device performance improves, but dislocation density and warpage increase
Solution Approach 1:
The patent optimizes the buffer layer thickness to 3 μm to 10 μm and adjusts the Si and C element concentrations to enable the formation of thick nitride semiconductor layers (total thickness 10 μm to 20 μm) while controlling dislocation density and warpage. The Si element concentration of 1×10^18 to 1×10^20 atoms/cm³ suppresses dislocation generation, allowing thicker active layers for high withstand voltage without proportionally increasing dislocation density.
Solution Approach 2:
The buffer layer acts as an intermediary between the silicon substrate and the thick nitride semiconductor active layer. It provides a transition region that manages the lattice mismatch and thermal expansion differences, enabling thick active layers to be grown with controlled dislocation density and warpage while achieving the required withstand voltage performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The substrate effectively supports high-frequency device production by improving withstand voltage and reducing parasitic capacitance while maintaining control over warpage and dislocation density, even at thicker layer thicknesses.
Implementation Method 1
a buffer layer doped with both silicon (Si) elements and carbon (C) elements
Implementation Method 2
the coefficient of thermal expansion of the sintered body is 0.7 to 1.4 times as great as the average coefficient of thermal expansion of the whole compound semiconductor layer
Implementation Method 3
The seed layer is made of a single crystal. The compound semiconductor layer has a buffer layer and an active layer, both of which are crystal-grown on the seed layer
Implementation Method 4
The ground substrate is composed of a sintered body
Data Source
AI summary
The present invention provides a nitride semiconductor substrate suitable for a high frequency device. The nitride semiconductor substrate has a substrate, a buffer layer made of group 13 nitride semiconductors, and an active layer made of group 13 nitride semiconductors in this order, wherein the substrate is composed of a first substrate made of polycrystalline aluminum nitride, and a second substrate made of Si single crystal having a specific resistance of 100 Ω·cm or more, formed on the first substrate, the average particle size of AlN constituting the first substrate is 3 to 9 μm, and preferably, the second substrate grown by the MCZ method has an oxygen concentration of 1E+18 to 9E+18 atoms/cm3 and a specific resistance of 100 to 1000 Ω·cm.