Nitride Semiconductor Substrate on Silicon via Hexagonal Buffer Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional nitride semiconductor devices, such as GaN-based laser diodes, face reduced luminescence efficiency due to internal electric fields in c-plane substrates and high costs and lattice mismatch issues with r-plane sapphire substrates, leading to defects and increased production costs.
Innovation Solution
A method for manufacturing a high-quality nitride semiconductor substrate involves forming a hexagonal buffer layer with a (1010) plane on a silicon substrate using physical vapor deposition, followed by epitaxial growth of a nitride semiconductor layer, which includes cleaning the substrate with ultrasonic waves and annealing the amorphous layer at controlled temperatures and times to achieve a non-polar m-plane GaN layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a c-plane GaN substrate is used for nitride semiconductor devices, then the device structure is simple and manufacturing is easier, but the luminescence efficiency decreases due to internal electric fields from polarization
Solution Approach 1:
The patent introduces an AlN buffer layer as an intermediary between the sapphire substrate and the GaN layer. This buffer layer mediates the lattice mismatch and reduces dislocation density, enabling high-quality m-plane GaN growth that achieves both good manufacturability and high luminescence efficiency by eliminating the polarization-related efficiency loss of c-plane substrates
Solution Approach 2:
The patent changes the crystal orientation parameter from c-plane to m-plane GaN growth. This parameter change fundamentally alters the polarization characteristics, eliminating the internal electric field problem that reduces luminescence efficiency in c-plane devices, while the AlN buffer layer enables this parameter change to be practically implemented
2Reliability
If an r-plane sapphire substrate is used to grow a-plane GaN, then the luminescence efficiency is improved by avoiding polarization effects, but the cost increases and defects are created due to high lattice mismatch of 16.2%
Solution Approach 1:
The AlN buffer layer serves as a critical intermediary that gradually transitions from the r-plane sapphire substrate to the a-plane GaN layer. This intermediate layer reduces the abrupt lattice mismatch stress, significantly decreasing dislocation density and defect formation while maintaining the non-polar a-plane orientation that ensures high luminescence efficiency
Solution Approach 2:
The patent applies beforehand cushioning by introducing the AlN buffer layer in advance to pre-compensate for the lattice mismatch stress. This buffer layer absorbs and distributes the mechanical stress before the GaN layer is grown, preventing defect formation that would otherwise occur due to the 16.2% lattice mismatch between r-plane sapphire and a-plane GaN
3Reliability
If an r-plane sapphire substrate is used to grow a-plane GaN, then the luminescence efficiency is improved, but the manufacturing cost increases due to the high cost of r-plane sapphire
Solution Approach 1:
The AlN buffer layer performs multiple functions: it serves as a lattice-mismatch buffer, a dislocation filter, and a template for a-plane GaN growth. This multi-functionality allows the use of relatively inexpensive r-plane sapphire substrates while achieving high luminescence efficiency, effectively decoupling the substrate cost from the final device performance
Solution Approach 2:
The patent employs a cost-effective approach by using the AlN buffer layer as a disposable intermediate structure that enables the use of lower-cost substrates. The buffer layer fulfills its critical function of enabling high-quality GaN growth on inexpensive r-plane sapphire, making the overall manufacturing process more cost-effective despite the additional layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of high-quality, cost-effective nitride semiconductor substrates with reduced defects and increased luminescence efficiency, utilizing a silicon substrate that is less expensive than traditional materials like sapphire or SiC.
Implementation Method 1
The amorphous layer may be formed using a physical vapor deposition (PVD) method. The annealing of the amorphous layer may be performed at a temperature of about 900-950° C. Additionally, the annealing process may be performed for about 30-60 minutes.
Implementation Method 2
The amorphous layer may be formed using a physical vapor deposition (PVD) method.
Implementation Method 3
The ultrasonic wave cleaning process may include sequentially cleaning the silicon substrate with hydrofluoric acid (HF), trichloroethylene (TCE), and ethanol.
Implementation Method 4
During annealing, the atmospheric gas may be nitrogen (N2) or ammonia (NH3) gas. When the atmospheric gas is ammonia gas, the ammonia gas may be injected at a temperature of about 600° C.
Data Source
AI summary
A method of manufacturing a nitride semiconductor substrate according to example embodiments may include forming a buffer layer on a (100) plane of a silicon (Si) substrate. The buffer layer may have a hexagonal crystal system and a (1010) plane. A nitride semiconductor layer may be epitaxially grown on the buffer layer. The nitride semiconductor layer may have a (1010) plane. Accordingly, because example embodiments enable the use of a relatively inexpensive Si substrate, a more economical nitride semiconductor substrate having a relatively large diameter may be achieved.