Group III Nitride Template Transfer for Low-Stress High-Quality Growth
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Solution Overview
Problem
Conventional methods for manufacturing group III nitride semiconductor templates face challenges in forming high-quality semiconductor layers due to differences in lattice constants and thermal expansion coefficients between the growth substrate and the semiconductor layer, leading to structural stress and cracks.
Innovation Solution
A method involving a laser lift-off technique is employed to separate the growth substrate from the semiconductor layer, followed by the formation of a polarity transform layer to change the surface polarity, allowing for the growth of a high-quality group III nitride semiconductor layer on a high heat dissipation support substrate with similar lattice constants and thermal expansion coefficients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If GaN materials are directly grown on Si single crystalline wafer, then productivity is improved, but manufacturing precision deteriorates due to large tensile stress from lattice constant and thermal expansion coefficient differences causing cracks
Solution Approach 1:
The patent segments the interface between Si substrate and GaN layer by introducing multiple intermediate layers (AlN buffer layer, AlGaN transition layer) to gradually bridge the lattice and thermal expansion mismatch, preventing direct contact and reducing stress concentration
Solution Approach 2:
The patent introduces AlN and AlGaN materials as intermediary layers between Si and GaN. These intermediary layers have graded lattice constants and thermal expansion coefficients that gradually transition from Si to GaN, acting as stress buffers and preventing crack formation
2Manufacturing precision
If AlGaN transition region is introduced for tensile stress relief, then manufacturing precision is improved, but device complexity increases due to additional material stacking
Solution Approach 1:
The patent applies local quality by creating a transition region with specifically engineered AlGaN layers having varying compositions (different Al content) at the critical interface zone, while keeping the bulk GaN layer and other regions simpler in structure
Solution Approach 2:
The patent uses composite material structures combining Si substrate, AlN buffer layer, AlGaN transition layer, and GaN active layer, where each material is selected for its specific properties to address particular challenges in the stack
3Ease of manufacture
If AlN re-melting prevention film is formed by in-situ MOCVD process, then ease of manufacture is improved, but manufacturing precision deteriorates when film thickness reaches 50 nm due to crystal quality deterioration
Solution Approach 1:
The patent performs preliminary actions by forming the AlN buffer layer with controlled thin thickness (below 50 nm) and specific growth conditions before growing the main GaN structure, ensuring the buffer layer provides sufficient stress relief without developing defects
Solution Approach 2:
The patent changes growth parameters (temperature, pressure, gas flow rates, layer thickness) during the MOCVD process to optimize the AlN buffer layer formation, maintaining high crystal quality while achieving sufficient stress management
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of a high-quality group III nitride semiconductor layer at high temperatures, minimizing structural stress and thermo-mechanical induced stress during growth, and improving the performance and quality of group III nitride power semiconductors.
Implementation Method 1
a sixth operation of separating the growth substrate from the semiconductor layer
Implementation Method 2
a seventh operation of forming a polarity transform layer for transforming a surface polarity of the semiconductor layer into a group III metal polarity on the semiconductor layer
Implementation Method 3
a fifth operation of bonding the first bonding layer and the second bonding layer to form a bonding layer
Implementation Method 4
a second operation of growing a semiconductor layer on the growth substrate
Implementation Method 5
by molecular beam epitaxy
Implementation Method 6
by metal organic chemical vapor deposition
Data Source
AI summary
The present invention relates to: a method for manufacturing a group III nitride semiconductor template, by which a high-quality group III nitride semiconductor layer can be formed on the top of a high heat dissipation support substrate having a lattice constant and thermal expansion coefficient equal or similar to those of the group III nitride semiconductor layer, by using a laser lift off (LLO) technique; and a semiconductor template manufactured thereby.