Nitride Power Transistor Substrate Breakdown Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Gallium nitride power transistors on silicon substrates face challenges with low breakdown voltage and electrostatic discharge issues, limiting their commercialization due to the electrical conductivity and material properties of silicon.
Innovation Solution
A nitride power transistor is developed with a silicon substrate featuring a differently doped semiconductor composite structure forming a space charge region, which increases the breakdown voltage by creating a high-resistance layer, and additional layers like GaN, AlN, and AlGaN are used to enhance electron mobility and prevent short-channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If gallium nitride power transistors are manufactured on silicon substrates, then manufacturing cost is reduced and ease of manufacture is improved, but breakdown voltage is limited due to silicon's electrical conductivity and low critical electric field
Solution Approach 1:
The silicon substrate is segmented into multiple regions with different doping types (P-type and N-type alternating layers) to create a composite structure. This segmentation allows the substrate to simultaneously provide mechanical support and form high-resistance space charge regions that block electrical breakdown, resolving the contradiction between ease of manufacture and breakdown voltage limitation.
Solution Approach 2:
The patent creates a composite semiconductor structure by introducing differently doped semiconductor layers (P-type and N-type) within the silicon substrate. This composite structure forms space charge regions with high resistance that prevent electrical breakdown, while maintaining the manufacturability advantages of silicon substrates. The composite material approach allows the substrate to exhibit both mechanical robustness and electrical isolation properties.
2Reliability
If field plate structure and increased gate-drain distance are used to increase breakdown voltage, then device reliability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent extracts the breakdown voltage enhancement function from the device structure (field plates and spacing) and transfers it to the substrate itself. By incorporating differently doped layers directly in the substrate, the substrate actively participates in voltage blocking, eliminating the need for additional field plate structures and complex spacing arrangements.
Solution Approach 2:
The patent changes the electrical parameters of the substrate by introducing alternating P-type and N-type doped layers. This parameter modification creates space charge regions with high resistance that inherently provide breakdown voltage protection, replacing the need for geometric modifications like field plates and increased spacing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly improves the breakdown voltage of the nitride power transistor, especially when the substrate is grounded, and enhances the overall device characteristics by increasing electron concentration and mobility, thus addressing the limitations of silicon-based gallium nitride power transistors.
Implementation Method 1
With introduction of longitudinal P-type doped semiconductor layers and N-type doped semiconductor layers inside a silicon substrate through epitaxial doping or ion implantation
Implementation Method 2
With introduction of longitudinal P-type doped semiconductor layers and N-type doped semiconductor layers inside a silicon substrate through epitaxial doping or ion implantation
Implementation Method 3
a space charge region is formed inside the P-type doped semiconductor layers and the N-type doped semiconductor layers. Conductive electrons and holes inside the space charge region are completely exhausted so that conductive channels do not exist, similar to a high-resistance region
Implementation Method 4
growing a nitride epitaxial layer on the silicon substrate
Data Source
AI summary
A nitride power transistor comprises: a silicon substrate comprising a differently doped semiconductor composite structure for forming a space charge depletion region; and a nitride epitaxial layer located on the silicon substrate. With introduction of a differently doped semiconductor composite structure for forming a space charge depletion region inside a silicon substrate of a nitride power transistor, the nitride power transistor is capable of withstanding a relatively high external voltage, and thus a breakdown voltage of the device is improved.


