Nitrided Dielectric Interfaces for FET Isolation and On-Resistance
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Solution Overview
Problem
Current device structures for field-effect transistors, particularly in CMOS processes using silicon-on-insulator substrates, face challenges in achieving optimal electrical isolation and reduced electrical losses while maintaining high-speed operation and low on-resistance.
Innovation Solution
The method involves forming nitrogen-enriched layers at specific interfaces between dielectric and semiconductor layers, which are then selectively retained or removed in different body regions to create nitrided and non-nitrided gate dielectrics, optimizing the dielectric properties and reducing dopant segregation, thereby improving the performance of field-effect transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dielectric layer is formed on a semiconductor layer in all body regions, then electrical isolation is improved, but on-resistance increases and device performance deteriorates
Solution Approach 1:
The patent applies local quality by forming nitrogen-enriched layers selectively at interfaces in different body regions. First body regions receive nitrided dielectric layers to improve electrical isolation, while second body regions maintain non-nitrided interfaces to preserve low on-resistance. This spatial differentiation of dielectric properties resolves the contradiction between electrical isolation and on-resistance.
2Reliability
If nitrogen-enriched layers are formed at all interfaces, then electrical isolation and junction breakdown voltage are improved, but leakage current increases
Solution Approach 1:
The patent implements local quality by selectively forming nitrogen-enriched layers only at interfaces in first body regions where high breakdown voltage is required, while deliberately omitting them from second body regions to minimize leakage current. This localized application of nitridation resolves the contradiction between improving breakdown voltage and reducing leakage.
3Adaptability or versatility
If selective removal of dielectric layers is performed, then device complexity increases, but adaptability for different transistor types is improved
Solution Approach 1:
The patent applies segmentation by dividing the substrate into first body regions for high-performance transistors requiring nitrided interfaces and second body regions for transistors benefiting from non-nitrided interfaces. This segmentation enables different transistor types to be optimized independently while using a unified fabrication process, balancing adaptability with process simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electrical properties of field-effect transistors by reducing on-resistance, maintaining high junction breakdown voltage, and minimizing leakage current, making them suitable for various applications such as switches and low-voltage logic.
Implementation Method 1
nitriding the first dielectric layer, forming a first nitrogen-enriched layer at a first interface between the first dielectric layer and the semiconductor layer
Data Source
AI summary
Device structures for field-effect transistors and methods of forming device structures for a field-effect transistor. A first dielectric layer is formed on a semiconductor layer and nitrided. A nitrogen-enriched layer is formed at a first interface between the first dielectric layer and the semiconductor layer. Another nitrogen-enriched layer is formed at a second interface between the semiconductor layer and a second dielectric layer. Device structures may include field-effect transistors that include one, both, and/or neither of the nitrogen-enriched layers.