Nitrided Gate Insulating Layer for MOSFET Leakage Reduction
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving low power consumption and efficient operation at low voltages due to high leakage currents associated with traditional gate insulating layers in MOSFETs.
Innovation Solution
The implementation of a nitrided gate insulating layer, specifically silicon oxynitride, formed using a method that includes conformally depositing a preliminary silicon oxide layer, nitriding it with RF bias and plasma, and then forming a gate electrode and capping layer, which reduces leakage current and enhances the MOSFET's on-current and off-current performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a traditional gate insulating layer is used in MOSFET, then the device structure is simple and manufacturing is easier, but leakage current increases and power consumption rises
Solution Approach 1:
The gate insulating layer is segmented into multiple distinct layers: a first gate insulating layer (silicon oxide) formed directly on the substrate, and a second gate insulating layer (silicon oxynitride) formed on top of the first layer. This segmentation allows each layer to perform its specific function - the first layer provides good interface characteristics with the substrate, while the second layer provides high breakdown voltage and low leakage current, thereby reducing overall power consumption without excessive complexity
Solution Approach 2:
The patent employs composite materials by combining silicon oxide and silicon oxynitride in a layered structure. The silicon oxide layer provides excellent electrical interface properties with the semiconductor substrate, while the silicon oxynitride layer contributes high dielectric strength and low leakage current characteristics. This composite structure achieves superior power efficiency by leveraging the complementary strengths of different materials
2Productivity
If the equivalent oxide thickness is reduced to improve device performance, then on-current increases, but leakage current also increases
Solution Approach 1:
Different regions of the gate insulating structure are assigned different materials with specific local qualities. The first gate insulating layer (silicon oxide) is positioned where excellent interface quality is needed for high on-current, while the second gate insulating layer (silicon oxynitride) is positioned to provide high breakdown voltage and low leakage current characteristics. This local optimization allows the device to achieve high on-current without proportionally increasing leakage current
Solution Approach 2:
The first gate insulating layer of silicon oxide is formed preliminarily on the substrate before forming the second gate insulating layer. This preliminary action creates a high-quality interface between the gate insulating structure and the semiconductor substrate, which is essential for achieving high on-current. Subsequently, the second layer is added to suppress leakage current, allowing the device to maintain low leakage even when the equivalent oxide thickness is reduced for higher on-current performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the equivalent oxide thickness, lowers threshold voltage, and improves the overall performance and efficiency of MOSFETs by minimizing leakage current and enhancing on-current while maintaining low off-current, thus enabling better power management in semiconductor devices.
Implementation Method 1
nitriding the preliminary gate insulating layer by applying a radio-frequency (RF) bias at a frequency of about 13.56 MHz and power between about 100 W and about 300 W to form a nitrided preliminary gate insulating layer including silicon oxynitride
Implementation Method 2
applying a radio-frequency (RF) bias at a frequency of about 13.56 MHz and power between about 100 W and about 300 W
Implementation Method 3
The nitriding of the preliminary gate insulating layer may include generating plasma using microwaves having a frequency of about 2.54 GHz and power between about 2000 W and about 3600 W
Data Source
AI summary
Semiconductor devices, and methods of fabricating the same, include forming device isolation regions in a substrate to define active regions, forming gate trenches in the substrate to expose the active regions and device isolation regions, conformally forming a preliminary gate insulating layer including silicon oxide on the active regions exposed in the grate trenches, nitriding the preliminary gate insulating layer using a radio-frequency bias having a frequency of about 13.56 MHz and power between about 100 W and about 300 W to form a nitrided preliminary gate insulating layer including silicon oxynitride, forming a gate electrode material layer on the nitride preliminary gate insulating layer, partially removing the nitrided preliminary gate insulating layer and the gate electrode material layer to respectively form a gate insulating layer and a gate electrode layer, and forming a gate capping layer on the gate electrode layer to fill the gate trenches.