3D Memory Nitrided Source Strap Contacts
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in effectively integrating nitrided direct source strap contacts with vertical semiconductor channels, which affects the reliability and performance of memory stack structures.
Innovation Solution
A three-dimensional memory structure is developed, featuring source-level material layers with a doped source contact layer directly contacting the vertical semiconductor channels, a silicon nitride liner between the doped source contact layer and the dielectric wall structure, and an alternating stack of electrically conductive and insulating layers, enabling direct contact and improved integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a doped source contact layer is formed directly on vertical semiconductor channels, then contact reliability is improved, but integration complexity increases
Solution Approach 1:
A silicon nitride liner is introduced as an intermediary layer between the doped source contact layer and the vertical semiconductor channels. This liner simplifies the integration process by providing a pre-formed interface that facilitates direct contact formation while maintaining reliability, thus resolving the contradiction between contact reliability and integration complexity
Solution Approach 2:
The silicon nitride liner is formed in advance before the doped source contact layer is deposited. This preliminary action prepares the surface for subsequent contact formation, making the integration process more straightforward and reliable while reducing the complexity of the overall manufacturing sequence
2Reliability
If nitrided direct source strap contacts are integrated with vertical semiconductor channels, then memory stack structure performance is improved, but manufacturing difficulty increases
Solution Approach 1:
The silicon nitride liner serves as a mediator that simplifies the manufacturing of nitrided direct source strap contacts. By providing a pre-formed nitrided surface, it eliminates the need for complex in-situ nitridation processes, thus improving memory stack structure performance while reducing manufacturing difficulty
Solution Approach 2:
The invention changes the chemical composition parameter of the contact interface by introducing silicon nitride. This parameter change enables direct contact formation with improved electrical properties without requiring complex nitridation processing, thereby improving performance while simplifying manufacturing
3Reliability
If source-level material layers are configured with multiple semiconductor layers, then integration of memory stack structures is enhanced, but process complexity increases
Solution Approach 1:
The source-level material layers are segmented into distinct functional layers: lower source-level semiconductor layer, upper source-level semiconductor layer, and doped source contact layer. This segmentation allows each layer to be optimized independently and simplifies the overall integration process by providing clear interfaces and functions, thus enhancing integration while managing process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the integration of memory stack structures, improves contact reliability, and maintains the desired thickness of semiconductor layers, thereby improving the overall performance and stability of the memory device.
Implementation Method 1
a silicon nitride liner located between the doped source contact layer and the dielectric wall structure
Implementation Method 2
a doped source contact layer comprising a third doped semiconductor material and contacting the lower source-level semiconductor layer and the upper source-level semiconductor layer... wherein the doped source contact layer contacts an outer sidewall of each of the vertical semiconductor channels
Implementation Method 3
an alternating stack of electrically conductive layers and insulating layers located over the source-level material layers
Data Source
AI summary
A lower source-level semiconductor layer, a sacrificial semiconductor layer, an upper source-level semiconductor layer, and an alternating stack of insulating layers and sacrificial material layers are sequentially formed over a substrate. An array of memory stack structures containing vertical semiconductor channels that extend through the alternating stack and into an upper portion of the lower source-level semiconductor layer is formed. A backside trench is formed through the alternating stack, and a source cavity is formed by removing the sacrificial semiconductor layer. A doped source contact layer is formed on each of the vertical semiconductor channels in the source cavity. A silicon nitride liner is formed on the doped source contact layer. The sacrificial material layers are replaced with electrically conductive layers. A dielectric wall structure is formed in the backside trench.