Nitrogen Plasma Sidewall Nitridation for Metal Contamination Control
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Solution Overview
Problem
Conventional semiconductor memory devices face issues with impurity diffusion and metal contamination during the manufacturing process, affecting the threshold voltage and electrical characteristics of transistors due to the use of polysilicon gate electrodes with metal layers, which can lead to undesired electrical characteristics and contamination in subsequent processes.
Innovation Solution
A method involving the formation of a diffusion barrier layer using nitrogen plasma treatment on the sidewalls of polysilicon and metal-containing layers to prevent impurity diffusion and metal contamination, ensuring desired electrical characteristics and maintaining the separation between adjacent gate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal layer is added to the gate electrode to reduce resistance, then the electrical conductivity is improved, but metal contamination occurs in subsequent heat treatment and wet etching processes
Solution Approach 1:
A silicon nitride barrier layer is introduced as an intermediary between the metal layer and the surrounding environment. This barrier layer prevents metal atoms from contaminating other elements during heat treatment and wet etching processes, while allowing the metal layer to maintain its low resistance function. The barrier layer acts as a protective mediator that isolates the metal from harmful interactions with other materials in the semiconductor device.
2Reliability
If impurities are doped into polysilicon to adjust work function, then the electrical characteristics are improved, but impurity diffusion occurs in successive manufacturing processes affecting threshold voltage
Solution Approach 1:
The silicon nitride barrier layer serves as an intermediary that prevents dopant atoms from diffusing out of the polysilicon gate electrode during subsequent manufacturing processes. This barrier layer maintains the dopant concentration profile within the polysilicon, ensuring stable threshold voltage and electrical characteristics throughout the fabrication process and device operation.
3Device complexity
If the gate electrode structure is simplified without barrier layers, then the device complexity is reduced, but impurity diffusion and metal contamination occur affecting transistor characteristics
Solution Approach 1:
The silicon nitride barrier layer is formed in-situ through plasma treatment of the polysilicon surface, creating a thin protective layer without requiring separate deposition steps. This approach adds minimal structural complexity while effectively preventing both impurity diffusion and metal contamination, thereby maintaining reliable transistor electrical characteristics throughout manufacturing and operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The diffusion barrier layer effectively prevents impurity and metal diffusion, ensuring stable threshold voltage and improved electrical characteristics of transistors while maintaining the desired distance between gate electrodes, thus enhancing the performance and reliability of semiconductor memory devices.
Implementation Method 1
The first sidewall of the electrically conductive layer is exposed to a nitrogen plasma to thereby form a first silicon nitride layer on the first sidewall
Implementation Method 2
exposed to a nitrogen plasma to thereby form a first silicon nitride layer on the first sidewall
Data Source
AI summary
Methods of forming integrated circuit devices include forming an electrically conductive layer containing silicon on a substrate and forming a mask pattern on the electrically conductive layer. The electrically conductive layer is selectively etched to define a first sidewall thereon, using the mask pattern as an etching mask. The first sidewall of the electrically conductive layer may be exposed to a nitrogen plasma to thereby form a first silicon nitride layer on the first sidewall. The electrically conductive layer is then selectively etched again to expose a second sidewall thereon that is free of the first silicon nitride layer. The mask pattern may be used again as an etching mask during this second step of selectively etching the electrically conductive layer.


