Nitrogen Profile Control in Semiconductor Tunnel Oxide
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in forming semiconductor devices with different nitrogen concentrations in their tunnel/gate oxide, as nitridation of the tunnel oxide improves NAND device reliability but degrades electron mobility in CMOS devices, and achieving distinct nitrogen profiles for CMOS and NAND devices is difficult.
Innovation Solution
A method is developed to form high and low voltage CMOS and NAND devices with specific nitrogen concentration profiles in the gate/tunnel oxide by using nitridation processes with ammonia, nitric oxide, or nitrogen dioxide, ensuring nitrogen is incorporated into the tunnel oxide of NAND devices without increasing the concentration in the gate oxide of CMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nitridation is performed to improve tunnel oxide reliability for NAND devices, then reliability is improved, but electron mobility in CMOS devices is degraded
Solution Approach 1:
The patent applies local quality by creating different nitrogen concentration profiles in different device regions. NAND devices receive full nitridation treatment for high reliability, while CMOS devices receive reduced or no nitridation to preserve electron mobility. This is achieved through selective masking or spatially differentiated processing conditions during the nitridation step.
Solution Approach 2:
The patent segments the device structure into distinct regions (NAND device areas and CMOS device areas) that receive different nitridation treatments. This segmentation allows independent optimization of each device type's oxide layer properties, enabling high nitrogen content in NAND tunnel oxides while maintaining low nitrogen content in CMOS gate oxides.
2Reliability
If nitrogen concentration is increased in tunnel oxide for NAND devices, then reliability is improved, but nitrogen concentration in gate oxide of CMOS devices increases unintentionally
Solution Approach 1:
The patent uses an intermediary masking layer or selective barrier structure that prevents nitrogen diffusion into CMOS gate oxide regions during the nitridation process. This intermediary element allows nitrogen to be incorporated into NAND tunnel oxides while blocking its entry into CMOS gate oxides, achieving selective nitrogen incorporation.
Solution Approach 2:
The patent implements local quality control by spatially differentiating the nitrogen incorporation process. Different regions of the semiconductor substrate receive different nitrogen concentrations based on device type, ensuring high nitrogen content in NAND tunnel oxides while maintaining low nitrogen content in CMOS gate oxides through selective processing.
3Ease of manufacture
If a single gate/tunnel oxide layer is formed for both CMOS and NAND devices, then manufacturing is simplified, but different nitrogen profiles cannot be achieved
Solution Approach 1:
The patent maintains a unified oxide formation process for both CMOS and NAND devices but introduces local quality differentiation through selective nitridation treatment. The initial oxide layer is formed uniformly across the substrate, then subsequent nitridation is applied selectively to NAND regions while protecting CMOS regions, achieving different nitrogen profiles from a common starting structure.
Solution Approach 2:
The patent performs preliminary oxide formation as a common step for both device types, then applies differentiated nitridation treatment in subsequent steps. This preliminary unified action simplifies the overall manufacturing process while allowing later selective modification to achieve device-specific nitrogen concentration profiles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of NAND devices while maintaining electron mobility in CMOS devices by achieving desired nitrogen profiles, ensuring the tunnel oxide of NAND devices has higher nitrogen concentrations than the gate oxide of CMOS devices, thereby improving overall semiconductor device performance.
Implementation Method 1
This may be performed using nitridation or an anneal in an ambient comprising NH3, NO, or NO2 before forming the floating gates and control gates
Data Source
AI summary
A method used during semiconductor device fabrication comprises forming at least two types of transistors. A first transistor type may comprise a CMOS transistor comprising gate oxide and having a wide active area and/or a long channel, and the second transistor type may comprise a NAND comprising tunnel oxide and having a narrow active area and/or short gate length. The transistors are exposed to a nitridation ambient. Various process embodiments and completed structures are disclosed.