Ring-Isolated NLDMOS Structure for STI Corner Breakdown

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Solution Overview

Problem

Conventional N-type laterally-double diffused metal-oxide semiconductor (NLDMOS) devices face challenges in achieving high withstand voltage and low on-resistance due to high electric field strength at the corners of shallow trench isolation (STI) structures, leading to premature breakdown and degradation, especially in ultra-high voltage applications above 100V.

Innovation Solution

A semiconductor device design featuring a substrate with a ring-like STI structure, a field oxide layer, and a gate polysilicon structure, where the STI is completely separated from the field oxide layer, allowing for enhanced withstand voltage performance without surface damage and reduced device size, using a combination of shallow trench isolation and local oxidation of silicon (LOCOS) processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dopant concentration of the drift region is increased to achieve high withstand voltage, then withstand voltage performance is improved, but electric field strength at STI corners increases causing premature breakdown

Engineering Contradiction:
Improvewithstand voltage performanceVSAvoidelectric field strength at STI corners
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A field oxide layer is introduced as an intermediary structure between the STI and the active semiconductor region. This field oxide layer acts as a mediator that redistributes and reduces the electric field concentration at the STI corners, allowing high dopant concentration in the drift region to be used without causing premature breakdown at the isolation structure corners.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different oxide structures at different locations: STI is used for peripheral isolation while a field oxide layer is specifically placed in the drift region where high electric field management is critical. This local differentiation allows optimization of electric field distribution in the high-voltage stress region without compromising overall device isolation.

Inventive Principle:
Principle #3Local quality

2Reliability

If LOCOS structure is used instead of STI to improve withstand voltage performance, then electric field strength at corners is reduced, but device complexity increases due to combining LOCOS and STI processes

Engineering Contradiction:
Improvewithstand voltage performanceVSAvoidprocess integration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation structure is segmented into two functional parts: STI for peripheral device isolation and field oxide for internal drift region electric field management. This segmentation allows each structure to be optimized for its specific function while using established fabrication processes for each, avoiding the need to redesign the entire isolation system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The field oxide layer serves multiple functions: it reduces electric field concentration at STI corners, provides additional electrical isolation in the drift region, and maintains compatibility with existing STI fabrication processes. This multi-functionality allows a single structure to address multiple requirements without significantly increasing process complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of stationary object

If STI structure is used in drift region, then device size is reduced compared to LOCOS, but surface damage occurs during etching and exposure processes

Engineering Contradiction:
Improvedevice sizeVSAvoidsurface damage from etching and exposure
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The field oxide layer is formed preliminarily in the drift region before final device fabrication steps. This preliminary structure provides protective coverage during subsequent etching and exposure processes, preventing surface damage to the underlying semiconductor while maintaining the compact dimensions enabled by STI technology.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively enhances the semiconductor device's withstand voltage performance, prevents surface damage from etching and exposure processes, and reduces the device size, addressing the limitations of previous designs while meeting high-voltage application requirements.

Implementation Method 1

a high electric field strength would be present at the corners of an STI structure due to the structure's own morphological characteristics

Methodology Applied
Scientific EffectElectric field redistribution: Electric Field

Implementation Method 2

replacing the STI structure in the drift region with a local oxidation of silicon (LOCOS) structure

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20240055516A1Semiconductor device
Publication Date: 2024.02.15 CSMC TECH FAB2 CO LTD
  • US20240055516A1 patent drawing
  • US20240055516A1 patent drawing

AI summary

This application provides a semiconductor device. The semiconductor device includes: a substrate (101) having a first conductivity type; an STI structure (108) disposed in the substrate (101) in the form of a first ring-like structure and surrounding a portion of the substrate (101), wherein a portion of the substrate surrounded by the STI structure serves as an active area (105); a drain doped region (103) disposed an a top of a central portion of the active area (105) and having a second conductivity type; source doped regions (102) having the second conductivity type, wherein the source doped regions are disposed at the top of the active area (105) on opposite sides of the drain doped region (103) and are spaced apart from the drain doped region (103); a field oxide layer (104) that is disposed over the top surface of the substrate (101) within the active area (105) in the form of a second ring-like structure and surrounds the drain doped region (103); gate polysilicon (106) that is disposed over the top surface of the substrate (101) and is in the form of a third ring-like structure surrounding the field oxide layer (104); and a drift region (107) having the second conductivity type wherein the drift region is disposed in the substrate (101) and surrounds the drain doped region (103).