NLFSR Galois Configuration for Secure High-Speed Keystream Generation

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Solution Overview

Problem

Current stream ciphers face challenges in providing efficient and secure encryption for high-data-rate wireless communication systems, such as 5G, due to vulnerabilities in existing stream ciphers like A5/1, A5/2, and RC4, which are susceptible to attacks, and block ciphers may not meet the latency and throughput requirements of future wireless communication standards.

Innovation Solution

A method and device utilizing a nonlinear feedback shift register (NLFSR) in a Galois configuration, where at least one register stage is representable by a linear feedback shift register (LFSR), with a nonlinear output function that outputs a keystream, providing a high level of assurance against attacks by reducing propagation delay and enhancing security through interlinked structures and feedback functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing stream ciphers (A5/1, A5/2, RC4) are used, then implementation is simple and well-established, but security is compromised due to susceptibility to attacks

Engineering Contradiction:
ImprovesecurityVSAvoidcipher structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple cryptographic components (LFSR for linear complexity, NLFSR for nonlinearity, Galois configuration for efficiency) to create a composite cipher structure that achieves both high security and performance, resolving the contradiction between security requirements and structural complexity

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The cipher is divided into distinct functional segments: LFSR stages for linear feedback, NLFSR stages for nonlinear feedback, and a separate nonlinear output function. This segmentation allows each component to be optimized independently while contributing to overall security

Inventive Principle:
Principle #1Segmentation

2Productivity

If block ciphers are used to meet security requirements, then security level is improved, but data rate and latency requirements of 5G systems are not met

Engineering Contradiction:
Improvedata rateVSAvoidsecurity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent replaces the traditional block cipher mechanical structure with a stream cipher approach using shift registers and feedback functions, enabling continuous data processing at high speeds while maintaining security through cryptographic feedback mechanisms

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The cipher uses configurable parameters including the number of register stages (n), the specific feedback polynomial coefficients, and the nonlinear function selection, allowing optimization for different data rate requirements while maintaining security properties

Inventive Principle:
Principle #35Parameter changes

3Reliability

If more nonlinear feedback stages are added to enhance security, then resistance to attacks is improved, but propagation delay and latency increase

Engineering Contradiction:
ImprovesecurityVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces the Galois configuration dimension, where feedback is applied in parallel across multiple register stages rather than sequentially, reducing the time dimension (latency) while maintaining the security provided by multiple nonlinear feedback stages

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10469247B2Stream ciphering technique
Publication Date: 2019.11.05 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • US10469247B2 patent drawing
  • US10469247B2 patent drawing
  • US10469247B2 patent drawing

AI summary

A technique for generating a keystream (128) for ciphering or deciphering a data stream (122) is provided. As to a method aspect of the technique, a nonlinear feedback shift register, NLFSR (112), including n register stages implemented in a Galois configuration is operated. At least one register stage of the implemented n register stages is representable by at least one register stage of a linear feedback shift register, LFSR. A first subset of the implemented n register stages is representable by a second subset of a second NLFSR. A number of register stages receiving a nonlinear feedback in the second NLFSR is greater than one and less than a number of register stages receiving a nonlinear feedback in the implemented NLFSR. The keystream (128) is outputted from a nonlinear output function (118). An input of the nonlinear output function (118) is coupled to at least two of the implemented n register stages of the NLFSR (112).