NMI-Gated Peripheral Access Against ROP and JOP Attacks
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Solution Overview
Problem
Existing data processing devices are vulnerable to security breaches through manipulation of non-malicious program code execution order, such as return-oriented programming (ROP) and jump-oriented programming (JOP), which compromise device security as more devices connect to the internet.
Innovation Solution
A device and method utilizing a non-maskable interrupt (NMI) signal path to enable secure peripheral access by performing a preconfigured NMI interrupt service routine (ISR), limiting access of malicious program code to peripheral components and ensuring secure execution through write-protected memory and NMI-driven access control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If peripheral components are accessible during normal execution, then ease of operation is improved, but security is worsened due to vulnerability to ROP/JOP attacks
Solution Approach 1:
The system segments peripheral access control into two distinct modes: normal execution mode with restricted access and NMI execution mode with enabled access. The NMI signal path creates a separate execution context that is isolated from malicious code manipulation, allowing secure peripheral access when needed while maintaining security during normal operation.
Solution Approach 2:
The NMI signal path acts as an intermediary mechanism that bypasses the normal execution flow vulnerable to ROP/JOP attacks. By using a dedicated non-maskable interrupt path with write-protected memory, the system creates a trusted entry point that can safely enable peripheral access without being susceptible to code manipulation attacks.
2Reliability
If NMI interrupt service routine is implemented for secure access, then security is improved, but device complexity is worsened
Solution Approach 1:
The security enhancement is applied locally to the NMI signal path and associated memory regions rather than requiring system-wide changes. Write-protection is enabled specifically for NMI-related memory areas, and peripheral access control is adjusted only when NMI is active, minimizing the impact on overall system complexity while providing targeted security improvements.
Data Source
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AI summary
According to an embodiment, a device comprises a non-maskable interrupt (NMI) signal path, a processor, and a peripheral component. The peripheral component may comprise secret data, such as a secret key. The processor may perform a preconfigured NMI interrupt service routine (ISR), in response to detecting a preconfigured signal in the NMI signal path. Access to at least a part of the peripheral component may be enabled in response to detecting the preconfigured signal in the NMI signal path. Thus, the processor may be able to access the secret data, for example, when the processor is running the NMI ISR. A device, a method, and a computer program are described.