NMOS PMOS Transistor Strain Engineering for Carrier Mobility

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Solution Overview

Problem

Current methods for improving carrier mobility in CMOS structures, such as using silicon germanium and strained materials, do not effectively balance the drive current improvements for NMOS and PMOS transistors, often resulting in negative impacts on PMOS transistors.

Innovation Solution

The method involves forming NMOS transistors with carbon-doped source/drain regions and a tensile SiN layer, while PMOS transistors are formed with germanium impurities and a compressive strain layer, aligning active channel regions parallel to the substrate's crystal orientation to optimize carrier mobility and drive current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If silicon germanium is used to improve carrier mobility, then drive current increases, but manufacturing complexity increases

Engineering Contradiction:

Improvecarrier mobilityVSAvoidmanufacturing process complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

Instead of changing material composition (silicon germanium), the patent changes physical parameters (crystal orientation and strain direction) to achieve the same goal of improved carrier mobility. This approach maintains manufacturing simplicity while achieving the desired performance improvement.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses standard silicon material with controlled crystal orientation and strain conditions rather than expensive silicon germanium alloys. This substitution of cheaper, more manufacturable materials achieves comparable or superior performance without increasing manufacturing complexity.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the drive current of NMOS transistors by 20-30% and maintains or slightly reduces the drive current of PMOS transistors, providing overall improvements in carrier mobility with minimal negative impact on PMOS performance.

Implementation Method 1

forming a tensile layer on the NMOS transistors to provide tensile strain in the active regions

Methodology Applied

Scientific EffectStrain: Deformation

Implementation Method 2

epitaxially growing C doped silicon in the source/drain regions to provide source/drain regions for the NMOS transistors

Methodology Applied

Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 3

forming the SiN layer to a thickness of about 50 Angstroms to about 2000 Angstroms using SiH4 gas provided at a rate of about 10 to about 100 sccm with NH3 gas provided at a rate of about 1 to about 5 slm

Methodology Applied

Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS7682888B2Methods of forming NMOS/PMOS transistors with source/drains including strained materials

Publication Date: 2010.03.23 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of forming an integrated circuit includes selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof and selectively forming source/drain regions of the NMOS transistors with Carbon (C) impurities therein.