NMP Memory Controller Synchronization with Host System
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Solution Overview
Problem
In advanced memory systems, the transition of control operations from a host system to a Near Memory Processing (NMP) module can lead to missed refreshes and calibration of Dynamic Random Access Memory (DRAM), resulting in data corruption and reliability issues due to asynchronous command execution between the host system and the NMP module.
Innovation Solution
The implementation of an NMP module with an I/O interface to receive commands from the host system, a decoder to decode these commands and generate triggers, and an NMP memory controller to synchronize operations by generating signals for refreshing and calibrating memory units, ensuring synchronized control operations between the host system and the NMP module.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the NMP module operates independently with its own memory controller, then processing efficiency is improved, but synchronization with host system commands is worsened leading to missed refreshes and calibration
Solution Approach 1:
The NMP memory controller monitors the command queue status and refresh/calibration completion status, using this feedback to dynamically adjust its operation. When the host command queue is empty or commands are completed, the controller automatically initiates refresh and calibration operations, ensuring these critical maintenance tasks are never missed while allowing independent operation to continue
Solution Approach 2:
The controller proactively checks the command queue status and schedules refresh/calibration operations in advance before data corruption can occur. By monitoring host command completion and preemptively initiating memory maintenance tasks, the system ensures reliability is maintained without compromising processing efficiency
2Speed
If the NMP module executes commands asynchronously, then processing speed is improved, but command synchronization with the host system is worsened
Solution Approach 1:
The controller continuously monitors host command queue status and uses this feedback to time its operations. By checking whether the host has issued or completed commands before executing refresh/calibration, the NMP module maintains asynchronous processing speed while avoiding synchronization conflicts and command conflicts
3Productivity
If the NMP module takes control of memory units independently, then access efficiency is improved, but missed refreshes and calibration occur
Solution Approach 1:
The NMP memory controller autonomously monitors its own operational state and the host command status, making independent decisions to initiate refresh and calibration operations. This self-service mechanism ensures that memory maintenance is performed automatically without external intervention, maintaining both access efficiency and calibration precision
Solution Approach 2:
The controller proactively initiates refresh and calibration operations at appropriate moments when memory units are accessed or when host commands are completed. By performing these maintenance tasks in advance before data corruption or voltage drift occurs, the system maintains calibration precision without compromising access efficiency
Data Source
AI summary
A Near Memory Processing (NMP) module including: a plurality of memory units; an Input/Output (I/O) interface configured to receive commands from a host system, wherein the host system includes a host memory controller configured to access the plurality of memory units; a decoder configured to decode the commands and generate a trigger; and an NMP memory controller configured to: receive the trigger from the decoder; and generate a signal in response to the trigger to synchronize the NMP module with the host system.