Neural Network Processor Safety Mechanisms for Intermediate Results
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Solution Overview
Problem
Artificial neural networks (ANNs) face challenges in ensuring functional safety, particularly in critical applications like autonomous vehicles, due to their complexity and susceptibility to random errors and adversarial strategies, which existing solutions do not fully address.
Innovation Solution
The development of a neural network processor incorporating multiple safety mechanisms such as redundancy by design, spatial mapping, self-tuning procedures, and error detection methods like cyclic redundancy code (CRC) checksums to monitor and correct errors, providing a system-level safety strategy tightly coupled with the processor architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple safety mechanisms (CRC checksums, redundancy) are incorporated into the ANN processor, then reliability and safety are improved, but device complexity increases
Solution Approach 1:
The processor architecture is segmented into distinct functional blocks (computational units, memory units, safety mechanism units) that operate independently. Each computational unit has dedicated safety mechanisms (CRC engines, checksum storage) that can function autonomously, allowing the system to maintain high reliability through modular redundancy without overwhelming complexity.
Solution Approach 2:
Safety mechanisms perform preliminary actions by calculating and storing CRC checksums before neural network computations are completed. This proactive error detection approach allows the system to identify potential failures before they propagate, improving reliability while keeping the safety overhead manageable through advance preparation.
2Reliability
If error detection and correction mechanisms are added to monitor NN intermediate results, then system immunity to errors is improved, but processing speed decreases
Solution Approach 1:
The safety mechanisms operate continuously and parallel to the main computational workflow. CRC checksum calculations are performed concurrently with neural network computations rather than sequentially, allowing error detection to proceed without interrupting the primary processing stream and minimizing speed penalty.
Solution Approach 2:
The system creates simplified copies of intermediate results specifically for safety verification purposes. Instead of reprocessing the entire neural network computation, the system maintains duplicate copies of critical intermediate values that can be quickly verified using lightweight CRC checks, enabling fast error detection with minimal processing overhead.
Data Source
AI summary
Novel and useful system and methods of several functional safety mechanisms for use in an artificial neural network (ANN) processor. The mechanisms can be deployed individually or in combination to provide a desired level of safety in neural networks. Multiple strategies are applied involving redundancy by design, redundancy through spatial mapping as well as self-tuning procedures that modify static (weights) and monitor dynamic (activations) behavior. The various mechanisms of the present invention address ANN system level safety in situ, as a system level strategy that is tightly coupled with the processor architecture. The NN processor incorporates several functional safety concepts which reduce its risk of failure that occurs during operation from going unnoticed. The mechanisms function to detect and promptly flag and report the occurrence of an error with some mechanisms capable of correction as well. The safety mechanisms cover data stream fault detection, software defined redundant allocation, cluster interlayer safety, cluster intralayer safety, layer control unit (LCU) instruction addressing, weights storage safety, and neural network intermediate results storage safety.