Neural Network Scheduling via Memory Benefit Prioritization

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Solution Overview

Problem

Convolutional neural networks (CNNs) face increased latency and inefficient hardware utilization due to large network sizes and frequent data transfers, necessitating improved allocation of CNN operations to limited computing resources.

Innovation Solution

A processor-implemented scheduling method that generates operation sets based on loop structures, prioritizes them using a priority table determined by memory benefits, and schedules them to optimize memory utilization and reduce data transfer, involving the use of directed acyclic graphs and threshold values for ordering operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If CNN operations are executed with frequent data transfers to handle large network sizes, then computation accuracy is maintained, but latency increases and hardware utilization becomes inefficient

Engineering Contradiction:
Improvecomputation accuracyVSAvoidlatency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments CNN operations into operation sets based on loop structures and data reuse patterns. By dividing the computation into discrete schedulable units that can be executed efficiently with minimal data transfer, the system maintains computation accuracy while reducing latency caused by frequent memory accesses.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary analysis of loop structures to identify data reuse opportunities before execution. By pre-calculating memory benefits and generating priority tables that predict data access patterns, the system prepares optimization strategies in advance, reducing runtime latency without compromising computation accuracy.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If more computing resources are allocated to handle large network sizes, then processing capability is improved, but hardware utilization efficiency decreases due to limited resources

Engineering Contradiction:
Improveprocessing capabilityVSAvoidhardware utilization efficiency
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent dynamically changes scheduling parameters based on memory benefits calculated from loop structures. By adjusting operation set priorities and execution timing according to data reuse characteristics, the system optimizes hardware utilization efficiency while maintaining processing capability for large network sizes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where memory benefits are calculated based on actual data reuse patterns, and this information feeds into priority table generation. This closed-loop approach ensures that scheduling decisions continuously adapt to resource availability, improving hardware utilization efficiency while maintaining processing capability.

Inventive Principle:
Principle #23Feedback

3Quantity of substance

If data reuse is increased to reduce data transfer size, then memory efficiency is improved, but operation scheduling complexity increases

Engineering Contradiction:
Improvedata transfer sizeVSAvoidoperation scheduling complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments operations into sets based on loop structures, which naturally group operations that share data. This segmentation reduces scheduling complexity by creating manageable units with predictable data reuse patterns, while still achieving reduced data transfer size through intelligent grouping.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent calculates memory benefits as a quantitative parameter to guide scheduling decisions. By transforming the complex problem of data reuse optimization into a parameter-driven priority system, the patent reduces scheduling complexity while maintaining effective data reuse to minimize data transfer size.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240193406A1Method and apparatus with scheduling neural network
Publication Date: 2024.06.13 SAMSUNG ELECTRONICS CO LTD
  • US20240193406A1 patent drawing
  • US20240193406A1 patent drawing
  • US20240193406A1 patent drawing

AI summary

A method and apparatus with scheduling a neural network (NN), which relate to extracting and scheduling priorities of operation sets, are provided. A scheduler may be configured to receive a loop structure corresponding to a NN model, generate a plurality of operation sets based on the loop structure, generate a priority table for the operation sets based on memory benefits of the operation sets, and schedule the operation sets based on the priority table.