No Tie-Bar Semiconductor Package for Shorter Electrical Paths
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Solution Overview
Problem
Existing semiconductor package formation methods rely on tie-bars and lead frames, which complicate the design and increase costs due to the need for tie-bars and wirebonds, and result in larger package form factors and longer electrical paths.
Innovation Solution
A method for forming a no tie-bar semiconductor package using a lead frame with no tie-bars and no wirebonds, where semiconductor die are attached to die attach flags using a die attach material, and electrical connections are made using electrical connectors, with the package being encapsulated and singulated without tie-bars or wirebonds, allowing for a flat no-leads package configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tie-bars and wirebonds are used in semiconductor package formation, then electrical connections can be established, but the package design becomes more complex and costs increase
Solution Approach 1:
The patent removes tie-bars from the lead frame structure, extracting the unnecessary supporting elements while retaining the essential electrical connection function through direct die-to-lead attachment and alternative support mechanisms during fabrication
Solution Approach 2:
The patent divides the package formation process into distinct stages where die are attached to lead frame segments (leads) directly without requiring continuous tie-bar support, allowing independent processing and simplification of each segment
2Stability of the object's composition
If tie-bars are used in lead frame, then structural support is provided, but package size increases
Solution Approach 1:
The patent extracts and eliminates tie-bars from the lead frame, removing the horizontal supporting structure that consumed package area while implementing alternative support methods that are more space-efficient
Solution Approach 2:
The patent transitions from horizontal tie-bar support to vertical/direct attachment architecture where die are mounted directly to leads, changing the dimensional approach to structural support and reducing planar footprint
3Reliability
If wirebonds are used for electrical interconnection, then electrical connections are established, but manufacturing costs and process complexity increase
Solution Approach 1:
The patent removes wirebonds from the electrical interconnection methodology, extracting the intermediate bonding step and replacing it with direct electrical contact methods that eliminate material and process complexity
Solution Approach 2:
The patent merges the electrical connection function directly into the die attachment process, combining mechanical support and electrical interconnection into a single integrated step rather than separate wirebonding and attachment operations
4Stability of the object's composition
If traditional lead frame with tie-bars is used, then die can be supported during fabrication, but electrical paths become longer
Solution Approach 1:
The patent extracts and removes tie-bars that created indirect electrical paths, eliminating the intermediate connection points that extended signal travel distance while maintaining die support through alternative means
Solution Approach 2:
The patent inverts the traditional architecture by attaching die directly to leads rather than using tie-bars as intermediaries, reversing the connection sequence to achieve shorter electrical paths while maintaining fabrication support capability
Data Source
AI summary
Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.