Noble Metal Contact Structure With Implanted Diffusion Barrier

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Solution Overview

Problem

The semiconductor industry faces challenges in forming reliable semiconductor devices as feature sizes decrease, leading to increased complexity and issues with metal diffusion during anneal processes, which result in bottom metal loss and yield and cost challenges.

Innovation Solution

A method is introduced where an ion implantation process forms a diffusion barrier layer within the conductive material by bonding ions to the conductive material, obstructing metal diffusion and mitigating the bottom metal loss issue, using a doped metal portion and doped dielectric layer to reduce metal diffusion during anneal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication process complexity increases and manufacturing reliability deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidfabrication reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs ion implantation to create a diffusion barrier layer before the metal diffusion problem occurs during anneal. This preliminary action prevents bottom metal loss by establishing a protective barrier in advance, thereby maintaining fabrication reliability while enabling continued scaling for productivity improvements

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional anneal processes are used without diffusion barriers, then processing is simpler, but metal diffusion occurs causing bottom metal loss and yield reduction

Engineering Contradiction:
Improveprocessing simplicityVSAvoidbottom metal loss
Core Design Contradiction:
Ease of manufactureVSLoss of substance

Solution Approach 1:

The patent introduces a diffusion barrier layer as an intermediary substance between the metal layer and the substrate. This barrier layer mediates the anneal process by blocking metal diffusion while allowing the anneal to proceed, thus preventing bottom metal loss without significantly complicating the manufacturing process

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If ion implantation is performed to form diffusion barrier layer, then metal diffusion is obstructed and bottom metal loss is reduced, but device complexity increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the physical-chemical parameters of the metal layer by introducing dopant ions through ion implantation. This parameter change transforms the metal layer into a diffusion barrier layer, enabling it to resist metal diffusion and improve device reliability while adding only one process step

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces metal diffusion and associated bottom metal loss, improving the reliability and yield of semiconductor devices while maintaining cost-effectiveness by controlling the thickness of the doped metal and dielectric layers.

Implementation Method 1

an implantation is performed after the disposing of the metal layer to form a barrier layer within the conductive material. The ions implanted into the conductive material are bonded to the conductive material to form the diffusion barrier layer

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

form a barrier layer within the conductive material... such that metal diffusion can be obstructed by the diffusion barrier layer

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS20240321751A1Semiconductor device and method for forming the same
Publication Date: 2024.09.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240321751A1 patent drawing
  • US20240321751A1 patent drawing
  • US20240321751A1 patent drawing

AI summary

A semiconductor device includes a first dielectric layer disposed over a substrate and a conductive feature, a doped dielectric layer disposed over the first dielectric layer, a first metal portion disposed in the first dielectric layer and in contact with the conductive feature, and a doped metal portion disposed over the first metal portion. The first metal portion and the doped metal portion include a same noble metal material. The doped dielectric layer and the doped metal portion include same dopants. The dopants are bonded to the noble metal material.