Network-on-Chip Access Manager for Temporal Separation

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Solution Overview

Problem

Existing system-on-a-chip technologies lack a simple and efficient method to temporally limit and separate access instances between master and slave units via standard network-on-a-chip bus systems, necessitating special development for security and real-time applications.

Innovation Solution

A method and circuit arrangement that expand a standard network-on-a-chip bus system with a central access manager and complementary logic for bus interfaces, controlled by a communication plan to enforce temporal requirements on access instances, allowing for temporal limiting and separating of access without additional development effort.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a standard network-on-a-chip bus system is used, then device complexity is reduced and ease of manufacture is improved, but temporal limiting and separating of access instances cannot be achieved

Engineering Contradiction:
Improveease of manufactureVSAvoidtemporal separation capability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces an adaptation unit as an intermediary component between the standard bus system and the master/slave units. This adaptation unit includes a temporal access controller that mediates access requests, enforcing temporal separation and limiting access instances according to predefined communication plans without modifying the standard bus system architecture itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the access control function by introducing separate adaptation units at different locations in the bus system. Each adaptation unit independently manages temporal access control for its associated master or slave units, allowing the temporal limiting function to be segmented and distributed without requiring system-wide modification.

Inventive Principle:
Principle #1Segmentation

2Reliability

If temporal limiting and separating of access instances is implemented, then security and real-time performance are improved, but device complexity increases

Engineering Contradiction:
ImprovesecurityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The adaptation unit is designed with multi-functionality, serving both security purposes (through temporal separation of access instances) and real-time performance requirements (through enforced temporal limits). This universal component handles multiple functions without requiring separate dedicated systems for each purpose.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If temporal limiting is enforced via communication plans, then predictability and security are improved, but ease of operation is reduced

Engineering Contradiction:
ImprovepredictabilityVSAvoidease of operation
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent implements preliminary action by pre-defining communication plans that specify temporal access patterns before the system operates. These predefined plans establish predictable temporal separation and security constraints in advance, allowing the system to automatically enforce them during operation without requiring complex real-time decision-making or manual intervention.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10318458B2Method and circuit arrangement for temporally limiting and separately accessing a system on a chip
Publication Date: 2019.06.11 SIEMENS AG OESTERR
  • US10318458B2 patent drawing
  • US10318458B2 patent drawing

AI summary

A circuit arrangement and method for temporally limiting and separating access between at least one master unit and at least one slave unit via a network-on-a-chip bus system in a system-on-a-chip, wherein the access between the at least one master and slave units is implemented via communication paths defined by bus interfaces, where within the circuit arrangement, the network-on-a-chip bus system is expanded by an adaptation unit that includes an access manager and a complementary logic for the bus interfaces, where the adaptation unit and the bus interfaces are then controlled by the access manager via the complementary logic using a communication plan such that access between the master and slave units via the communication paths specified by bus interfaces is performed in accordance with the temporal requirements of the communication plan so that time-controlled systems can be implemented simply using commercially obtainable standard bus systems.