NoC Bus Controller Dynamic Routing for Uniform Data Flow

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Solution Overview

Problem

Conventional multi-route control techniques for Network on Chip (NoC) communication buses lead to non-uniform data flow rates between links, causing increased data transfer latency, higher operating frequencies, and excessive power dissipation due to competitive routing among bus masters.

Innovation Solution

A bus controller that adjusts data transfer rates to achieve uniformity across multiple routes by collecting output information from each route, calculating estimated flow rates, and dynamically changing routes to distribute data transfer rates more evenly, thereby reducing operating frequencies and power dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional multi-route control techniques are used for NoC communication buses, then multiple bus masters can access the bus simultaneously, but non-uniform data flow rates are caused among different links

Engineering Contradiction:
Improvedata transfer capabilityVSAvoiduniformity of data flow rate
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The bus controller collects output information (flow rate data) from each route and uses this feedback to dynamically adjust route selection. The controller calculates estimated flow rates for multiple routes and selects routes based on maintaining uniform data flow distribution, thereby resolving the non-uniformity problem while preserving high data transfer capability

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts route selection based on real-time flow rate conditions rather than using static routing. The bus controller continuously monitors output information and changes routes adaptively to maintain uniform data flow distribution across all links, transforming the routing from a fixed to a dynamic decision-making process

Inventive Principle:
Principle #15Dynamics

2Productivity

If competitive routing among bus masters is allowed, then bus utilization increases, but data transfer latency increases due to non-uniform flow rates

Engineering Contradiction:
Improvebus utilizationVSAvoiddata transfer latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The bus controller uses feedback from output information about current flow rates on each route to make intelligent routing decisions. By selecting routes that maintain uniform flow distribution, the system avoids congestion on overloaded links while keeping bus utilization high, thereby reducing data transfer latency without sacrificing productivity

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system changes the routing parameter (route selection) based on flow rate conditions. By dynamically adjusting which route is used for data transfer according to current load conditions, the system optimizes both bus utilization and data transfer latency, preventing the latency increase that would result from non-uniform flow distribution

Inventive Principle:
Principle #35Parameter changes

3Productivity

If non-uniform data transfer rates are distributed across links, then some links require higher operating frequencies, but power dissipation increases

Engineering Contradiction:
Improvedata transfer rateVSAvoidpower dissipation
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The bus controller collects feedback information about current flow rates on each route and uses this to select routes that distribute load uniformly. This prevents any single link from requiring excessively high operating frequencies to handle concentrated traffic, thereby reducing overall power dissipation while maintaining high data transfer rates across the network

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts route selection to balance the data transfer load across all links. By preventing any single link from becoming a bottleneck that requires high operating frequency, the system reduces the cumulative power dissipation while maintaining high overall data transfer capability through coordinated use of multiple routes

Inventive Principle:
Principle #15Dynamics

4Speed

If lumped bus design is used to connect bus masters, then wiring delay is reduced, but operating frequency must be increased to guarantee highest data transfer rates, causing more power dissipation

Engineering Contradiction:
Improvedata transfer rateVSAvoidpower dissipation
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent segments the communication network into multiple independent routes with distributed bus controllers rather than using a single lumped bus. Each route can operate at lower frequencies independently, and the segmentation allows parallel data transfer across multiple routes, achieving high overall data transfer rates without requiring any single link to operate at high frequency, thereby reducing power dissipation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from a one-dimensional lumped bus architecture to a multi-dimensional network with multiple parallel routes. This dimensional change allows data to be distributed across multiple paths simultaneously, achieving high aggregate data transfer rates without concentrating load on a single high-frequency link, thus reducing overall power dissipation while maintaining speed

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP2453612B1Bus control device
Publication Date: 2014.12.03 PANASONIC HOLDINGS CORP
  • EP2453612B1 patent drawingFigure 1(a)~2
  • EP2453612B1 patent drawingFigure 3~4
  • EP2453612B1 patent drawingFigure 5

AI summary

This invention provides a bus controller that can eliminate non-uniformity in data flow rate between links and is arranged between a bus master and a networked communication bus to control the transmission route of a packet flowing through the bus. The controller includes: a data receiving section for receiving output status information from other bus controllers on transmission routes available; a route load detecting section for calculating uniformity of distribution index indicating the degree of non-uniformity in transmission flow rate between the routes based on the output status information; a routing section for determining transmission routes, of which the transmission flow rates have been adjusted by reference to the index; a packet assembling section for generating a packet; a data output section for outputting the packet through one of output ports; a header analyzing section for determining which output port is connected to a transmission route chosen by reference to information about the packet receiving end; and a data output section for outputting the packet through the output port.