NoC Bypass Logic for Latency Reduction
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Solution Overview
Problem
Network on Chip (NoC) architectures face challenges in managing latency and bandwidth due to scalability limitations of traditional buses and crossbar-based interconnects, leading to congestion and inefficiencies in message routing and channel utilization.
Innovation Solution
Implementing an opportunistic bypass system and a valid-ready credit system for Network on Chip (NoC) elements, which allows for configurable bypasses and efficient management of virtual channels to reduce latency and optimize traffic flow by selecting bypass paths based on expected traffic flows and bandwidth demands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional buses and crossbar-based interconnects are used, then simplicity of structure is maintained, but scalability and performance deteriorate due to congestion and inefficiencies
Solution Approach 1:
The interconnect is divided into multiple virtual channels (VC0, VC1, VC2, VC3) that share physical links, allowing parallel message routing and reducing congestion. Each virtual channel operates independently with its own arbitration, enabling the system to handle multiple traffic flows simultaneously without interference.
Solution Approach 2:
The patent introduces a virtual dimension by creating multiple logical channels over physical links. This virtualization layer adds complexity at the logic level but simplifies the physical interconnect structure, allowing scalable network performance without proportionally increasing physical complexity.
2Productivity
If arbitration and multiplexing are implemented for channel sharing, then channel utilization is improved, but latency increases due to arbitration delays
Solution Approach 1:
The system pre-allocates virtual channels and establishes routing paths before message transmission. Virtual channel identifiers are embedded in message headers, and routing decisions are made based on pre-configured virtual channel mappings, eliminating the need for dynamic arbitration during message transmission and reducing latency.
Solution Approach 2:
The patent implements a fast path mechanism that allows certain messages to bypass arbitration and multiplexing stages by directly accessing dedicated virtual channels. This skipping mechanism enables critical messages to traverse the interconnect with minimal delay while maintaining high channel utilization through shared virtual channels for non-critical traffic.
3Productivity
If virtual channels are multiplexed over physical links, then bandwidth efficiency is improved, but complexity of channel management increases
Solution Approach 1:
The patent creates a universal virtual channel interface that can be mapped to different physical links and routing paths. The same virtual channel logic handles multiple physical channels, and the system provides a unified management interface for all virtual channels regardless of their underlying physical implementation, simplifying channel management while maintaining bandwidth efficiency.
4Stability of the object's composition
If deterministic routing is used, then packet ordering is maintained, but load balancing across path diversities is lost
Solution Approach 1:
The system implements dynamic routing where virtual channel mappings can be adjusted based on network conditions. Messages of the same flow can be routed through different virtual channels and physical paths while maintaining ordering through sequence numbering and acknowledgment mechanisms. This dynamic approach enables load balancing across diverse paths while preserving packet ordering through protocol-level guarantees.
Data Source
AI summary
Example implementations described herein are directed to a configurable Network on Chip (NoC) element that can be configured with a bypass that permits messages to pass through the NoC without entering the queue or arbitration. The configurable NoC element can also be configured to provide a protocol alongside the valid-ready protocol to facilitate valid-ready functionality across virtual channels.